Direct-bonded LED arrays and applications are provided. An example process fabricates a LED structure that includes coplanar electrical contacts for p-type and n-type semiconductors of the LED structure on a flat bonding interface surface of the LED structure. The coplanar electrical contacts of the flat bonding interface surface are direct-bonded to electrical contacts of a driver circuit for the LED structure. In a wafer-level process, micro-LED structures are fabricated on a first wafer, including coplanar electrical contacts for p-type and n-type semiconductors of the LED structures on the flat bonding interface surfaces of the wafer. At least the coplanar electrical contacts of the flat bonding interface are direct-bonded to electrical contacts of CMOS driver circuits on a second wafer. The process provides a transparent and flexible micro-LED array display, with each micro-LED structure having an illumination area approximately the size of a pixel or a smallest controllable element of an image represented on a high-resolution video display.

A light-emitting diode 100 includes a first region 1, for example of the P type, formed in a first layer 10 and forming, in a direction normal to a basal plane, a stack with a second region 2 having at least one quantum well formed in a second layer 20, and including a third region 3, for example of the N type, extending in the direction normal to the plane, bordering and in contact with the first and second regions 1, 2, through the first and second layers 10, 20. A process for producing a light-emitting diode 100 in which the third region 3 is formed by implantation into and through the first and second layers 10, 20.

Discussed is a self-assembly apparatus for a plurality of semiconductor light-emitting devices, and a method for self-assembly of the plurality of semiconductor light-emitting devices, whereby the apparatus includes a chamber accommodating the plurality of semiconductor light-emitting devices and a fluid; a transferor to transfer a substrate to an assembly position; a magnet to apply a magnetic force to the plurality of semiconductor light-emitting devices; a position controller to control a position of the magnet; and a vibration generator in contact with the fluid to generate a vibration in the fluid to separate the plurality of semiconductor light-emitting devices from each other while in the fluid, wherein an electric field is produced in the substrate while the plurality of semiconductor light-emitting devices are moved according to a change of the position of the magnet.

An alternating electric field-driven gallium nitride (GaN)-based nano-light-emitting diode (nanoLED) structure with an electric field enhancement effect is provided. The GaN-based nanoLED structure forms a nanopillar structure that runs through an indium tin oxide (ITO) layer, a p-type GaN layer, a multiple quantum well (MQW) active layer and an n-type GaN layer and reaches a GaN buffer layer; and the nanopillar structure has a cross-sectional area that is smallest at the MQW active layer and gradually increases towards two ends of a nanopillar, forming a pillar structure with a thin middle and two thick ends. The shape of the GaN-based nanopillar improves the electric field strength within the QW layer in the alternating electric field environment and increases the current density in the QW region of the nanopillar structure under current driving, forming strong electric field gain and current gain, thereby improving the luminous efficiency of the device.

A method for fabricating epitaxial light control features, without reactive ion etching or wet etching, when active layers are included. The epitaxial light control features comprise light extraction or guiding structures integrated on an epitaxial layer of a light emitting device such as a light emitting diode. The light extraction or guiding structures are fabricated on the epitaxial layer using an epitaxial lateral overgrowth (ELO) technique. The epitaxial light control features can have many different shapes and can be fabricated with standard processing techniques, making them highly manufacturable at costs similar to standard processing techniques.

The present disclosure provides a growth method and structure of LED epitaxy. The growth method of LED epitaxy comprises: providing a layer of substrate, wherein the substrate is an Al.sub.2O.sub.3 substrate or an Al.sub.2O.sub.3/SiO.sub.2 composite substrate; successively depositing and growing a SiC buffer layer and a u-GaN layer on the substrate; wherein the temperature used for depositing the SiC buffer layer is 6501550 degrees; the gas used for depositing the SiC buffer layer is a silicon source gas and a carbon source gas, a flow rate of the silicon source gas is 11000 sccm, and a flow rate of the carbon source gas is 11000 sccm; a gas carrier gas used for depositing the SiC buffer layer has a flow rate of 10500 slm; the SiC buffer layer is deposited at a pressure of 100700 torr; the SiC buffer layer is deposited for a thickness of 101000 A.

In accordance with aspects of the present technology, a unique charge carrier transfer process from c-plane InGaN to semipolar-plane InGaN formed spontaneously in nanowire heterostructures can effectively reduce the instantaneous charge carrier density in the active region, thereby leading to significantly enhanced emission efficiency in the deep red wavelength. Furthermore, the total built-in electric field can be reduced to a few kV/cm by cancelling the piezoelectric polarization with spontaneous polarization in strain-relaxed high indium composition InGaN/GaN heterostructures. An ultra-stable red emission color can be achieved in InGaN over four orders of magnitude of excitation power range. Accordingly, aspects of the present technology advantageously provide a method for addressing some of the fundamental issues in light-emitting devices and advantageously enables the design of high efficiency and high stability optoelectronic devices.

The present disclosure provides techniques for epitaxial oxide materials, structures and devices. In some embodiments, an integrated circuit includes a field effect transistor (FET) and a waveguide coupled to the FET, wherein the waveguide comprises a signal conductor. The FET can include: a substrate comprising a first oxide material; an epitaxial semiconductor layer on the substrate, the epitaxial semiconductor layer comprising a second oxide material with a first bandgap; a gate layer on the epitaxial semiconductor layer, the gate layer comprising a third oxide material with a second bandgap, wherein the second bandgap is wider than the first bandgap; and electrical contacts. The electrical contacts can include: a source electrical contact coupled to the epitaxial semiconductor layer; a drain electrical contact coupled to the epitaxial semiconductor layer; and a first gate electrical contact coupled to the gate layer.

Disclosed is a method for monolithic integration preparation of a full-color nitride semiconductor micro light-emitting diode (micro-LED) array. The method includes preparing a composite conductive substrate; overlaying an insulating template onto the composite conductive substrate to prepare a template substrate; overlaying monocrystalline graphene onto the template substrate in a completely aligned manner to obtain a customized template graphene substrate including graphene array units, wherein one blue-region graphene array element, one green-region graphene array element, and two red-region graphene array elements in each graphene array unit have surface properties different from each other; then performing an in-situ process to epitaxially grow a vertical-structure all-nitride material, to obtain a full-color micro-LED array epitaxial wafer by one-step in-situ process; finally, performing packaging and preparing a transparent electrode, to obtain a vertical-structure full-color nitride micro-LED array with top light emission.

A method for manufacturing an image display device includes: providing a second substrate that includes a first substrate, and a semiconductor layer grown on the first substrate, the semiconductor layer including a light-emitting layer; providing a third substrate including: a circuit including a circuit element formed on a light-transmitting substrate, a first insulating film covering the circuit, and a conductive layer including a light-reflective part formed on the first insulating film; bonding the semiconductor layer to the third substrate; forming a light-emitting element from the semiconductor layer; forming a second insulating film covering the conductive layer, the light-emitting element, and the first insulating film; forming a via extending through the first and second insulating films; and electrically connecting the light-emitting element and the circuit element by the via.