The disclosure describes various aspects of monolithic integration of different light emitting structures on a same substrate. In an aspect, a device for light generation is described having a substrate with one or more buffer layers made a material that includes GaN. The device also includes light emitting structures, which are epitaxially grown on a same surface of a top buffer layer of the substrate, where each light emitting structure has an active area parallel to the surface and laterally terminated, and where the active area of different light emitting structures is configured to directly generate a different color of light. The device also includes a p-doped layer disposed over the active area of each light emitting structure and made of a p-doped material that includes GaN. The device may be part of a light field display and may be connected to a backplane of the light field display.

A light-emitting chip includes a light-emitting unit, first and second electrode units. The light-emitting unit includes first and second conductivity type semiconductor layers and an active layer. The first electrode unit includes two first electrodes which are spaced apart from each other by a first distance, and which are electrically connected to the first conductivity type semiconductor layer. The second electrode unit includes two second electrodes electrically connected to the second conductivity type semiconductor layer. The first and second electrode units are spaced apart from each other by a second distance, and the first distance is greater than the second distance.

A light-emitting diode 100 includes a first region 1, for example of the P type, formed in a first layer 10 and forming, in a direction normal to a basal plane, a stack with a second region 2 having at least one quantum well formed in a second layer 20, and including a third region 3, for example of the N type, extending in the direction normal to the plane, bordering and in contact with the first and second regions 1, 2, through the first and second layers 10, 20. A process for producing a light-emitting diode 100 in which the third region 3 is formed by implantation into and through the first and second layers 10, 20.

Disclosed is a light emitting diode using light of a short wavelength band. The light emitting diode includes a first conductivity type semiconductor layer having a front side and a back side, a second conductivity type semiconductor layer having a front side and a back side, an active layer formed between the back side of the first conductivity type semiconductor layer and the front side of the second conductivity type semiconductor layer, a first electrode electrically connected to the first conductivity type semiconductor layer, a second conductivity type reflective layer formed on the back side of the second conductivity type semiconductor layer, and a reflective part formed on the second conductivity type reflective layer to reflect light of a short wavelength band and light of a blue wavelength band and electrically connected to the second conductivity type semiconductor layer. The second conductivity type reflective layer includes DBR unit layers. Each of the DBR unit layers includes a low refractive index layer and a high refractive index layer adjacent to the low refractive index layer. The low refractive index layer and the high refractive index layer include Al.sub.xGa.sub.1-xN (0<x1) and Al.sub.yGa.sub.1-yN (0y<1, y<x), respectively.

A light emitting device can include a GaN layer having a multilayer structure that can include an n-type layer, an active layer, and a p-type layer, the GaN layer having a first surface and a second surface; a conductive structure on the first surface of the GaN layer, the conductive structure includes a first electrode in contact with the first surface of the GaN layer, the first electrode is configured to reflect light from the active layer back through the second surface of the GaN layer; and a metal layer including Au, in which the metal layer serves as a first pad; a second electrode on the second surface of the GaN layer; and a second pad on the second electrode, in which a thickness of the second pad is about 0.5 m or higher.

An optoelectronic component and a method for the producing an optoelectronic component are disclosed. In an embodiment, the component comprises an active zone for generating electromagnetic radiation, wherein the active zone adjoins at least one layer arrangement of a semiconductor material, wherein the layer arrangement comprises at least two layers, wherein the two layers are formed in such a way that at an interface between the two layers a piezoelectric field is provided, the piezoelectric field configured to provide an electrical voltage drop at the interface, wherein a peak doping region is provided at the interface of the two layers in order to reduce the electrical voltage drop, wherein, in the direction away from the active zone, a doping of the peak doping region increases at least by a first percentage value and then decreases by at least a second percentage value, and wherein the first percentage value and the second percentage value are greater than 10% of a maximum doping of the peak doping region.

A display device may include a display area including pixel areas each including an emission area, a non-display area, and a pixel disposed in each of the pixel areas. The pixel may include a first electrode, a second electrode spaced apart from the first electrode and surrounding a periphery of the first electrode, a third electrode spaced apart from the second electrode and surrounding a periphery of the second electrode, a fourth electrode spaced apart from the third electrode and surrounding a periphery of the third electrode, light emitting elements disposed between the first to fourth electrodes, and first and second conductive lines disposed under the first to fourth electrodes with an insulating layer disposed therebetween. The first conductive line may be electrically connected to the first electrode, and the second conductive line may be electrically connected to the fourth electrode.

Disclosed in an embodiment is a semiconductor device comprising a semiconductor structure, which comprises a first conductive semiconductor layer, a second conductive semiconductor layer, and an active layer disposed between the first conductive semiconductor layer and the second conductive semiconductor layer, wherein: the first conductive semiconductor layer comprises a first super lattice layer comprising a plurality of first sub layers and a plurality of second sub layers, the first and second sub layers being alternately arranged; the semiconductor structure emits ions of indium, aluminum, and a first and second dopant during a primary ion irradiation; the intensity of indium ions emitted from the active layer includes a maximum indium intensity peak; the doping concentration of the first dopant emitted from the first conductive semiconductor layer includes a maximum concentration peak; the maximum indium intensity peak is disposed to be spaced from the maximum concentration peak in a first direction; the intensity of indium ions emitted from the plurality of first sub layers has a plurality of first indium intensity peaks; the doping concentration of the first dopant emitted from the plurality of first sub layers has a plurality of first concentration peaks; and the plurality of first indium intensity peaks and the plurality of first concentration peaks are disposed between the maximum indium intensity peak and the maximum concentration peak.

A carbon doped short period superlattice is provided. A heterostructure includes a short period superlattice comprising a plurality of quantum wells alternating with a plurality of barriers. One or more of the quantum wells and/or the barriers includes a carbon doped layer (e.g., a non-percolated or percolated carbon atomic plane).

A superlattice and method for forming that superlattice are disclosed. In particular, an engineered layered single crystal structure forming a superlattice is disclosed. The superlattice provides p-type or n-type conductivity, and comprises alternating host layers and impurity layers, wherein: the host layers consist essentially of a semiconductor material; and the impurity layers consist of a donor or acceptor material.