H10H20/826

SINTERED BODY, SEMICONDUCTOR SUBSTRATE, SEMICONDUCTOR DEVICE, AND METHOD OF MANUFACTURING THEREOF
20240413208 · 2024-12-12 · ·

A molding is formed by laminating an aggregate of SiC and a paste containing Si and C powders on an epitaxial layer of SiC formed on a support substrate of SiC to form an intermediate sintered body in which polycrystalline SiC is produced from the Si and C powders by reaction sintering, free Si is carbonized to SiC to form a sintered body layer, and the support substrate is removed from the epitaxial layer to form a semiconductor substrate in which the epitaxial layer and the sintered body layer are laminated.

Packaged semiconductor devices including backside power rails and methods of forming the same

Methods for forming packaged semiconductor devices including backside power rails and packaged semiconductor devices formed by the same are disclosed. In an embodiment, a device includes a first integrated circuit device including a first transistor structure in a first device layer; a front-side interconnect structure on a front-side of the first device layer; and a backside interconnect structure on a backside of the first device layer, the backside interconnect structure including a first dielectric layer on the backside of the first device layer; and a first contact extending through the first dielectric layer to a source/drain region of the first transistor structure; and a second integrated circuit device including a second transistor structure in a second device layer; and a first interconnect structure on the second device layer, the first interconnect structure being bonded to the front-side interconnect structure by dielectric-to-dielectric and metal-to-metal bonds.

3D SEMICONDUCTOR DEVICE AND STRUCTURE WITH MEMORY CELLS AND MULTIPLE METAL LAYERS

A 3D semiconductor device including: a first level including a first single crystal layer and first transistors, which each include a single crystal channel; a first metal layer with an overlaying second metal layer; a second level including second transistors, overlaying the first level; a third level including third transistors, overlaying the second level; a fourth level including fourth transistors, overlaying the third level, where the second level includes first memory cells, where each of the first memory cells includes at least one of the second transistors, where the fourth level includes second memory cells, where each of the second memory cells includes at least one of the fourth transistors, where the first level includes memory control circuits, where second memory cells include at least four memory arrays, each of the four memory arrays are independently controlled, and at least one of the second transistors includes a metal gate.

FIELD EFFECT TRANSISTOR (FET) AND METHOD OF MANUFACTURING THE SAME

A field-effect transistor includes a substrate, a channel on the substrate including a stem including silicon extending in a vertical direction from the substrate and a number of prongs including silicon extending in a horizontal direction from the stem and spaced apart from each other along the vertical direction, an interfacial layer surrounding the stem and the prongs of the channel, a dielectric layer on the interfacial layer and surrounding the stem and the prongs of the channel, and a metal gate on the dielectric layer and surrounding the stem and the prongs of the channel.

HIGH EFFICIENCY LEDS AND LED LAMPS
20170358625 · 2017-12-14 ·

In various embodiments, lighting systems include an electrically insulating carrier having a plurality of conductive elements disposed thereon and a light-emitting array. The light-emitting array is disposed over the carrier and includes a plurality of light-emitting diodes (LEDs) that each has at least two electrical contacts electrically connected to conductive elements by an electrical connection featuring solder.

TECHNIQUES FOR FORMING OPTOELECTRONIC DEVICES
20170358704 · 2017-12-14 ·

Embodiments relate to use of a particle accelerator beam to form thin films of material from a bulk substrate are described. In particular embodiments, a bulk substrate having a top surface is exposed to a beam of accelerated particles. In certain embodiments, this bulk substrate may comprise GaN; in other embodiments this bulk substrate may comprise (111) single crystal silicon. Then, a thin film or wafer of material is separated from the bulk substrate by performing a controlled cleaving process along a cleave region formed by particles implanted from the beam. In certain embodiments this separated material is incorporated directly into an optoelectronic device, for example a GaN film cleaved from GaN bulk material. In some embodiments, this separated material may be employed as a template for further growth of semiconductor materials (e.g. GaN) that are useful for optoelectronic devices.

Method of production of a semiconducting structure comprising a strained portion

A method of production of a semiconducting structure including a strained portion tied to a support layer by molecular bonding, including the steps in which a cavity is produced situated under a structured part so as to strain a central portion by lateral portions, and the structured part is placed in contact and molecularly bonded with a support layer, wherein a consolidation annealing is performed, and a distal part of the lateral portions in relation to the strained portion is etched.

High efficiency LEDs and LED lamps

In various embodiments, lighting systems include an electrically insulating carrier having a plurality of conductive elements disposed thereon and a light-emitting array. The light-emitting array is disposed over the carrier and includes a plurality of light-emitting diodes (LEDs) that each has at least two electrical contacts electrically connected to conductive elements by a conductive adhesive.

Method for forming a semiconducting portion by epitaxial growth on a strained portion

The invention pertains to formation of a semiconducting portion (60) by epitaxial growth on a strained germination portion (40), comprising the steps in which a cavity (21) is produced under a structured part (11) by rendering free a support layer (30) situated facing the structured part (11), a central portion (40), termed the strained germination portion, then being strained; and a semiconducting portion (60) is formed by epitaxial growth on the strained germination portion (40), wherein the structured part (11) is furthermore placed in contact with the support layer (30) in such a way as to bind the structured part (11) of the support layer.

RESIN MOLDING, SURFACE MOUNTED LIGHT EMITTING APPARATUS AND METHODS FOR MANUFACTURING THE SAME
20170229615 · 2017-08-10 · ·

The present invention provides a surface mounted light emitting apparatus which has long service life and favorable property for mass production, and a molding used in the surface mounted light emitting apparatus.

The surface mounted light emitting apparatus comprises the light emitting device 10 based on GaN which emits blue light, the first resin molding 40 which integrally molds the first lead 20 whereon the light emitting device 10 is mounted and the second lead 30 which is electrically connected to the light emitting device 10, and the second resin molding 50 which contains YAG fluorescent material and covers the light emitting device 10. The first resin molding 40 has the recess 40c comprising the bottom surface 40a and the side surface 40b formed therein, and the second resin molding 50 is placed in the recess 40c. The first resin molding 40 is formed from a thermosetting resin such as epoxy resin by the transfer molding process, and the second resin molding 50 is formed from a thermosetting resin such as silicone resin.