A manufacturing method of a composite substrate capable of suppressing damage due to heat treatment after bonding, and a composite substrate manufactured by the method are provided. The manufacturing method of a composite substrate according to the present invention is a manufacturing method of a composite substrate in which a piezoelectric wafer, which is a lithium tantalate wafer or lithium niobate wafer, and a support wafer are bonded together. This manufacturing method is characterized by a step of bonding a piezoelectric wafer and a support wafer, and a step of performing heat treatment of the wafer bonded in the step of bonding, with the non-bonded surface of the piezoelectric wafer being a mirror surface.

An RF integrated circuit device can includes a substrate and a High Electron Mobility Transistor (HEMT) device on the substrate including a ScAlN layer configured to provide a buffer layer of the HEMT device to confine formation of a 2DEG channel region of the HEMT device. An RF piezoelectric resonator device can be on the substrate including the ScAlN layer sandwiched between a top electrode and a bottom electrode of the RF piezoelectric resonator device to provide a piezoelectric resonator for the RF piezoelectric resonator device.

A piezoelectric device includes a connection section including a first coupling portion, a second coupling portion, and a bridging portion. The first coupling portion extends along a slit and is connected to one of a pair of beam sections. The second coupling portion extends along the slit and is connected to another of the pair of beam sections. The bridging portion is located between the slit and an opening and is connected to both of the first coupling portion and the second coupling portion. The beam sections are connected to each other in a circumferential direction of a base having an annular shape via the connecting section while each of the beam sections is interposed between the slits extending in intersecting directions.

The present invention relates to a heterostructure, in particular, a piezoelectric structure, comprising a cover layer, in particular, a layer of piezoelectric material, the material of the cover layer having a first coefficient of thermal expansion, assembled to a support substrate, the support substrate having a second coefficient of thermal expansion substantially different from the first coefficient of thermal expansion, at an interface wherein the cover layer comprises at least a recess extending from the interface into the cover layer, and its method of fabrication.

A bonded body includes a supporting substrate, silicon oxide layer provided on the supporting substrate, and a piezoelectric material substrate provided on the silicon oxide layer and composed of a material selected from the group consisting of lithium niobate, lithium tantalate and lithium niobate-lithium tantalite. A nitrogen concentration at an interface between the piezoelectric material substrate and silicon oxide layer is higher than a nitrogen concentration at an interface between the silicon oxide layer and the supporting substrate.

A bonded body includes a supporting substrate, silicon oxide layer provided on the supporting substrate, and a piezoelectric material substrate provided on the silicon oxide layer and composed of a material selected from the group consisting of lithium niobate, lithium tantalate and lithium niobate-lithium tantalite. A nitrogen concentration at an interface between the piezoelectric material substrate and silicon oxide layer is higher than a nitrogen concentration at an interface between the silicon oxide layer and the supporting substrate.

A composite substrate according to includes: a support substrate; and a piezoelectric layer arranged on one side of the support substrate, wherein an amplitude of a waviness having a spatial frequency of more than 0.045 cyc/mm according to a shape of the support substrate is 10 nm or less.

In a piezoelectric device, a layered portion includes, at a position at least above a recess, a single crystal piezoelectric layer and a pair of electrode layers to apply voltage to the single crystal piezoelectric layer. At least a portion of the pair of electrode layers includes a lower electrode layer extending along a surface of the single crystal piezoelectric layer, the surface being closer to a base. The lower electrode layer is present only inside the recess.

A wafer level ultrasonic chip module includes a substrate, a composite layer, a conducting material, and a base material. The substrate has a through slot that passes through an upper surface of the substrate and a lower surface of the substrate. The composite layer includes an ultrasonic body and a protective layer. A lower surface of the ultrasonic body is exposed from the through slot. The protective layer covers the ultrasonic body and a partial upper surface of the substrate. The protective layer has an opening, from which a partial upper surface of the ultrasonic body is exposed. The conducting material is in contact with the upper surface of the ultrasonic body. The base material covers the through slot, such that a space is formed among the through slot, the lower surface of the ultrasonic body and an upper surface of the base material.

The present invention relates to a heterostructure, in particular, a piezoelectric structure, comprising a cover layer, in particular, a layer of piezoelectric material, the material of the cover layer having a first coefficient of thermal expansion, assembled to a support substrate, the support substrate having a second coefficient of thermal expansion substantially different from the first coefficient of thermal expansion, at an interface wherein the cover layer comprises at least a recess extending from the interface into the cover layer, and its method of fabrication.