Patent classifications
H10N52/01
SPIN-ORBIT-TORQUE MAGNETORESISTIVE RANDOM-ACCESS MEMORY WITH INTEGRATED DIODE
A spin-orbit torque magnetoresistive random-access memory device formed by fabricating a spin-Hall-effect (SHE) layer above and in electrical contact with a transistor, forming a spin-orbit-torque (SOT) magnetoresistive random access memory (MRAM) cell stack disposed above and in electrical contact with the SHE rail, wherein the SOT-MRAM cell stack comprises a free layer, a tunnel junction layer, and a reference layer, forming a cylindrical diode structure above and in electrical contact with the SOT-MRAM cell stack, forming a write line disposed in electrical contact with the SHE rail, and forming a read line disposed above and adjacent to an outer cylindrical electrode of the diode structure.
INSULATED CURRENT SENSOR
A circuit for sensing a current comprises a substrate having a first and a second major surface, the second major surface being opposite to the first major surface. At least one magnetic field sensing element is arranged on the first major surface of the substrate and is suitable for sensing a magnetic field caused by a current flow in a current conductor coupled to the second major surface. The substrate also comprises at least one insulation layer, substantially buried between the first major surface and the second major surface of the substrate.
SPIN-ORBIT-TORQUE MAGNETORESISTIVE RANDOM-ACCESS MEMORY
A spin-orbit torque magnetoresistive random-access memory device formed by fabricating a spin-Hall-effect (SHE) layer above and in electrical contact with a transistor, forming a spin-orbit-torque (SOT) magnetoresistive random access memory (MRAM) cell stack disposed above and in electrical contact with the SHE rail, wherein the SOT-MRAM cell stack comprises a free layer, a tunnel junction layer, a reference layer, and a diode structure, forming a write line disposed in electrical contact with the SHE rail, forming a protective dielectric layer covering a portion of the SOT-MRAM cell stack, and forming a read line disposed above and adjacent to the diode structure.
MAGNETIC MEMORY DEVICE
A magnetic memory device includes a conductive line extending in a first direction, a magnetic tunnel junction structure on a first surface of the conductive line, the magnetic tunnel junction structure comprising at least two magnetic patterns and a barrier pattern between the at least two magnetic patterns, and a magnetic layer on a second surface of the conductive line, which is opposite to the first surface. The magnetic layer includes magnetization components having a magnetization in a direction which is parallel to the second surface and intersects the first direction.
STACKED SPIN-ORBIT-TORQUE MAGNETORESISTIVE RANDOM-ACCESS MEMORY
A spin-orbit torque magnetoresistive random-access memory device formed by fabricating a plurality of stacks of vertical magnetoresistive random-access memory (MRAM) cell stacks, each stack formed upon a different bottom electrode, each stack including: a first vertical MRAM cell stack, the first vertical MRAM cell stack disposed upon a first bottom electrode, a first metal layer disposed above and in electrical contact with the first MRAM cell stack, and a second vertical MRAM cell stack, the second MRAM cell stack disposed above and in electrical contact with the first metal layer. Further by fabricating a low resistivity layer between adjacent stacks of vertical MRAM cell stacks, the low resistivity layer in electrical contact with the spin-Hall-Effect layer of each of the adjacent stacks.
Hall-effect sensor package with added current path
A Hall-effect sensor package includes and an IC die including a Hall-Effect element and a leadframe including leads on a first side providing a first field generating current (FGC) path including≥1 first FGC input pin coupled by a reduced width first curved head over or under the Hall-effect sensor element to ≥1 first FGC output pin, and second leads on a second side of the package. Some leads on the second side are attached to bond pads on the IC die including the output of the Hall-effect element. A clip is attached at one end to the first FGC input pin and at another end to a location on the first FGC output pin, having a reduced width second curved head in between that is over or under the Hall-effect sensor element opposite the first head.
Spin orbit memory devices with reduced magnetic moment and methods of fabrication
A spin orbit memory device includes a material layer stack on a spin orbit electrode. The material layer stack includes a magnetic tunnel junction (MTJ) and a synthetic antiferromagnetic (SAF) structure on the MTJ. The SAF structure includes a first magnet structure and a second magnet structure separated by an antiferromagnetic coupling layer. The first magnet structure includes a first magnet and a second magnet separated by a single layer of a non-magnetic material such as platinum. The second magnet structure includes a stack of bilayers, where each bilayer includes a layer of platinum on a layer of a magnetic material such.
SENSOR DEVICE AND METHOD FOR MANUFACTURING SAME
The present invention relates to a sensor device which has high S/N and excellent temperature characteristics. A sensor device has a semiconductor substrate, a first metal wiring layer provided on the semiconductor substrate, a first insulating layer provided on the first metal wiring layer, a compound semiconductor sensor element provided on the first insulating layer, a second metal wiring layer provided on the compound semiconductor sensor element and the first insulating layer, and a second insulating layer provided on the second metal wiring layer. A third insulating layer is provided between the first metal wiring layer and the second metal wiring layer, and the compound semiconductor sensor element is provided in the third insulating layer.
MULTIFERROIC TUNNEL JUNCTION MEMORY DEVICE AND RELATED METHODS
An electronic device may include a first electrode, a first magnetostrictive layer electrically coupled to the first electrode, a first ferroelectric layer above the first ferromagnetic layer, and a ferromagnetic layer above the first ferroelectric layer. The electronic device may further include a second electrode electrically coupled to the ferromagnetic layer, a second ferroelectric layer above the ferromagnetic layer, a second magnetostrictive layer above the second ferroelectric layer, and a third electrode electrically coupled to the second magnetostrictive layer. The first ferroelectric layer may be switchable between different polarization states responsive to a first voltage applied across the first and second electrodes, and the second ferroelectric layer may be switchable between different polarization states responsive to a second voltage applied across the second and third electrodes.
MULTIFERROIC TUNNEL JUNCTION MEMORY DEVICE AND RELATED METHODS
An electronic device may include a first electrode, a first magnetostrictive layer electrically coupled to the first electrode, a first ferroelectric layer above the first ferromagnetic layer, and a ferromagnetic layer above the first ferroelectric layer. The electronic device may further include a second electrode electrically coupled to the ferromagnetic layer, a second ferroelectric layer above the ferromagnetic layer, a second magnetostrictive layer above the second ferroelectric layer, and a third electrode electrically coupled to the second magnetostrictive layer. The first ferroelectric layer may be switchable between different polarization states responsive to a first voltage applied across the first and second electrodes, and the second ferroelectric layer may be switchable between different polarization states responsive to a second voltage applied across the second and third electrodes.