When bending a superconducting cable of a stack conductor structure in which a plurality of layers of tape wires are stacked, a twisting process is performed for the superconducting cable immediately before a bending portion of the superconducting cable.

A multi-layer semiconductor structure includes a first semiconductor structure and a second semiconductor structure, with at least one of the first and second semiconductor structures provided as a superconducting semiconductor structure. The multi-layer semiconductor structure also includes one or more interconnect structures. Each of the interconnect structures is disposed between the first and second semiconductor structures and coupled to respective ones of interconnect pads provided on the first and second semiconductor structures. Additionally, each of the interconnect structures includes a plurality of interconnect sections. At least one of the interconnect sections includes at least one superconducting and/or a partially superconducting material.

A method for bonding two superconducting integrated circuits (“chips”), such that the bonds electrically interconnect the chips. A plurality of indium-coated metallic posts may be deposited on each chip. The indium bumps are aligned and compressed with moderate pressure at a temperature at which the indium is deformable but not molten, forming fully superconducting connections between the two chips when the indium is cooled down to the superconducting state. An anti-diffusion layer may be applied below the indium bumps to block reaction with underlying layers. The method is scalable to a large number of small contacts on the wafer scale, and may be used to manufacture a multi-chip module comprising a plurality of chips on a common carrier. Superconducting classical and quantum computers and superconducting sensor arrays may be packaged.

A superconducting wire comprises a MgB.sub.2 filament, a base material, a high-thermal expansion metal, and a stabilizing material. The high-thermal expansion metal is a metal (for example, stainless steel) having a higher thermal expansion coefficient at room temperature than the MgB.sub.2 and the base material (for example, iron or niobium). The manufacturing method includes a step of packing a mixed powder in a first metal pipe, a step of performing wire-drawing on the first metal pipe formed of the metal to be the base material, a step of producing a composite wire by accommodating the first metal pipe in a second metal pipe formed of the high-thermal expansion metal and the stabilizing material, a step of performing wire-drawing on the composite wire, and a step of performing heat treatment.

Qubit circuits having components formed deep in a substrate are described. The qubit circuits can be manufactured using existing integrated-circuit technologies. By forming components such as superconducting current loops, inductive, and/or capacitive components deep in the substrate, the footprint of the qubit circuit integrated within the substrate can be reduced. Additionally, coupling efficiency to and from the qubit can be improved and losses in the qubit circuit may be reduced.

A quantum device (100) includes: an interposer (112); a quantum chip (111); and a connection part (130) that is provided between the interposer (112) and the quantum chip (111) and electrically connects a wiring layer of the interposer (112) to a wiring layer of the quantum chip (111), in which the connection part (130) includes: a plurality of pillars (131) arranged on a main surface of the interposer (112); and a metal film (132) provided on a surface of the plurality of pillars (131) in such a way that it contacts the wiring layer of the quantum chip (111) and the thickness of the metal film at outer peripheral parts of the tip of each of the plurality of pillars (131) becomes larger than the thickness of the metal film at a center part of the tip of each of the plurality of pillars (131).

A quantum device (100) includes: an interposer (112); a quantum chip (111); and a connection part (130) that is provided between the interposer (112) and the quantum chip (111) and electrically connects a wiring layer of the interposer (112) to a wiring layer of the quantum chip (111), in which the connection part (130) includes: a plurality of pillars (131) arranged on a main surface of the interposer (112); and a metal film (132) provided on a surface of the plurality of pillars (131) in such a way that it contacts the wiring layer of the quantum chip (111) and the thickness of the metal film at outer peripheral parts of the tip of each of the plurality of pillars (131) becomes larger than the thickness of the metal film at a center part of the tip of each of the plurality of pillars (131).

A device includes: a substrate including a superconductor quantum device, the superconductor quantum device including a superconductor material that exhibits superconducting properties at or below a corresponding critical temperature; a cap layer bonded to the substrate; and a sealed cavity between the cap layer and the substrate.

The present disclosure provides a two-dimensional scalable superconducting qubit structure and a method for controlling a cavity mode thereof. The two-dimensional scalable superconducting qubit structure includes: a superconducting qubit chip comprising a plurality of two-dimensionally distributed and scalable qubits; a capacitor part of each of the qubits has at least five arms distributed two-dimensionally, two of the at least five arms in each qubit are respectively connected with a read coupling circuit and a control circuit, and the other at least three arms are coupled with adjacent qubits through a coupling cavity.

A device includes: a substrate including a superconductor quantum device, the superconductor quantum device including a superconductor material that exhibits superconducting properties at or below a corresponding critical temperature; a cap layer bonded to the substrate; and a sealed cavity between the cap layer and the substrate.