METHOD FOR MANUFACTURING A CIRCUIT CARRIER AND CIRCUIT CARRIER FOR ELECTRONIC COMPONENTS

20170236777 · 2017-08-17

    Inventors

    Cpc classification

    International classification

    Abstract

    A method for manufacturing a circuit carrier for electronic components includes making available a carrier material layer made of an electrically insulating material and having at least one connecting layer which is applied at least to a first and/or second surface of the carrier material layer and has in each case a predefined layer thickness. Each connecting layer has a number of electrically conductive connections with a predefined conductor track width. At least some of the connections are strengthened by plasma spraying, at least in certain sections, with additional electrically conductive material. As a result, a greater layer thickness than the predefined layer thickness and/or a larger conductor track width than the predefined conductor track width is obtained. Furthermore, a circuit carrier for electronic components is specified.

    Claims

    1-14. (canceled)

    15. A method for producing a circuit carrier for electronic components, the method comprising: providing a carrier material layer composed of an electrically insulating material having a first surface and a second surface, which is arranged parallel to the first surface, and a connection layer on at least one of the first and second surfaces of the carrier material layer, the connection layer having a predefined layer thickness and each connection layer including a plurality of electrically conductive connections with a predefined conductor track width; reinforcing at least some of the connections, at least in sections thereof, by plasma spraying with additional electrically conductive material, to form reinforced connections, at least in sections thereof, with one or both of a layer thickness that is greater than the predefined layer thickness or a conductor track width that is greater than the predefined conductor track width; and thereby applying the additional material at least in places areally on a soldering resist or directly on the carrier material layer.

    16. The method according to claim 15, wherein the step of providing the carrier material layer with the connection layer comprises providing a standard circuit board with the electrical connections, and the reinforcing step comprises subsequently applying additional material on some of the connections of the standard circuit board.

    17. The method according to claim 15, wherein the step of providing the carrier material layer with the said connection layer comprises the following steps: providing a first ply composed of the electrically insulating material, and a further connection layer of a predefined layer thickness on the first ply; reinforcing the further connection layer, at least in sections thereof, with the additional electrically conductive material by plasma spraying, to obtain a layer thickness greater than the predefined layer thickness; providing a second ply composed of the electrically insulating material; joining together the first ply and the second ply, to thereby arrange the further connection layer internally inside the carrier material layer; and applying the said connection layer; and forming the further connection layer in such a way that the further connection layer occupies an area region of the circuit carrier which is arranged underneath a component in a direction orthogonally to the first or second surface, and the area region is reinforced by the plasma spraying at least in section with the additional electrically conductive material.

    18. The method according to claim 15, which comprises applying a metal selected from the group consisting of copper, aluminum and bronze as additional electrically conductive material during the plasma spraying.

    19. The method according to claim 15, which comprises applying the additional material areally on the soldering resist, with the soldering resist covering the connection layer arranged on the first and/or the second surface.

    20. A circuit carrier for electronic components, the circuit carrier comprising: a carrier material layer composed of an electrically insulating material having a first surface and a second surface, which is arranged parallel to the first surface; a connection layer applied at least on one or both of the first and second surfaces of the carrier material layer and having in each case a predefined layer thickness, each said connection layer having a plurality of electrically conductive connections with a predefined conductor track width; at least some of said connections being reinforced by plasma spraying with additional electrically conductive material, and having a layer thickness greater than the predefined layer thickness and/or a conductor track width greater than the predefined conductor track width; and said additional material being disposed at least in places directly on said carrier material layer or on a soldering resist.

    21. The circuit carrier according to claim 20, wherein a thickness of said additional material is up to 30 times greater than the predefined layer thickness.

    22. The circuit carrier according to claim 20, wherein a width of a respective section reinforced with said additional material is up to 50 times greater than the predefined conductor track width of a non-reinforced section.

    23. The circuit carrier according to claim 20, wherein said additional material projects beyond the predefined conductor track width on said carrier material layer or on the soldering resist.

    24. The circuit carrier according to claim 20, wherein said additional material produces an electrical connection between two contact pads of two connections of a same connection layer, said contact pads originally being electrically insulated from one another.

    25. The circuit carrier according to claim 20, wherein the sections of said connections provided with said additional material are not covered with a soldering resist.

    26. The circuit carrier according to claim 20, wherein the sections of said connections not provided with said additional material are covered with a soldering resist.

    27. The circuit carrier according to claim 20, wherein said carrier material layer has a circuit board section in which a thickness of said electrically insulating material is reduced, and a ductile metallic material is arranged as the additional electrically conductive material in said circuit board section, to render said circuit board section semiflexible.

    28. The circuit carrier according to claim 20, which further comprises at least one further connection layer having a predefined layer thickness disposed internally in said carrier material layer, wherein said further connection layer occupies an area region of said circuit carrier disposed below a component in a direction orthogonally with respect to said first surface or said second surface, and said area region is reinforced by plasma spraying at least in sections with the additional electrically conductive material, as a result of which a layer thickness greater than the predefined layer thickness is provided.

    Description

    [0056] In the figures:

    [0057] FIG. 1 shows a schematic cross-sectional illustration of an electronic component applied on a circuit carrier according to the invention,

    [0058] FIGS. 2a and 2b show a cross-sectional illustration and a plan view of a conventional circuit carrier, and

    [0059] FIGS. 3a and 3b show a cross-sectional illustration and a plan view of a circuit carrier according to the invention.

    [0060] FIG. 1 shows a schematic cross-sectional illustration of a circuit carrier 10 according to the invention, on which circuit carrier an electronic component 30 is applied by way of example. The circuit carrier 10 in the form of a circuit board has a carrier material layer 11 composed of an electrically insulating material. Glass fiber mats impregnated with epoxy resin (known by the material identifier FR4) can be used as material of the carrier material layer 11. For special applications it is also possible to use other materials, such as e.g. Teflon, aluminum oxide or ceramic and also polyester film in flexible circuit boards. The carrier material layer 11 has a first surface 12 facing the component 30, and a second surface 13 facing a carrier plate 50 of the entire arrangement, said carrier plate serving as a heat sink.

    [0061] In the exemplary embodiment shown in FIG. 1, a first connection layer 14 is applied on the first surface 12 and a second connection layer 15 is applied on the second surface 13. In addition, by way of example, a third connection layer 16 and a fourth connection layer 17 are arranged (optionally) internally in the carrier material layer 11. Each of the connection layers 14, 15, 16, 17 forms a dedicated conductor trace structure having a respectively predefined layer thickness.

    [0062] Each conductor trace structure comprises a number of electrically conductive connections (so-called conductor traces) having a predefined conductor track width. At ends of conductor traces, connection pads or the like can be formed, the width of which deviates from the conductor track width. The conductor traces of respective connection layers 14, 15, 16, 17 can be electrically interconnected among one another by means of so-called plated-through holes 18 (so-called vias). The layer thickness of a respective connection layer 14, 15, 16, 17 is typically between 30 μm and 35 μm. The thickness of these layers, also referred to as base copper, may also be smaller or larger in individual cases. The conductor track width of the conductor traces provided for signal transmission is approximately 100 μm. In this respect, the circuit carrier 10 constitutes a standard circuit board having a conductor trace structure for a logic circuit which can be manufactured in a production process as known to the person skilled in the art and described in the introduction.

    [0063] If both a logic circuit and a power circuit are intended to be realized on such a circuit carrier, then the realization of the power circuit requires electrically conductive connections which have a very much greater layer thickness and/or conductor track width for carrying the high currents required. For the joint realization of a power and logic circuit, the area required for the power circuit is usually very much smaller than that required for the logic circuit. Therefore, it suffices to provide only a portion of the electrically conductive connections with corresponding current conductivity.

    [0064] In the further description it is assumed that the component 30 shown in FIG. 1 is a power component whose connection requires conductor trace structures having greater current conductivity than the conductor trace structures produced in the context of the production of a standard circuit board.

    [0065] The component 30 comprises a semiconductor chip 31, for example, in a manner known to the person skilled in the art, said semiconductor chip being applied, by means of a solder layer 32, on a heat sink 33 composed of a material having good thermal conductivity. With its main area facing away from the semiconductor chip, the heat sink 33 is linked to a heat spreading area 21 of the first connection layer 14 by means of a solder or some other layer 40 having good thermal conductivity. The heat spreading area 21 constitutes an area of the first connection layer 14 that corresponds to the area of the heat sink 33.

    [0066] The task of the heat spreading area 21 is to laterally distribute the heat generated by the semiconductor chip 31 under the heat sink 33. By means of plated-through holes 26 of the circuit carrier 10 that are arranged in a distributed manner below the heat spreading area 21, heat can then be dissipated to the hot plate 50 embodied as a heat sink. For this purpose, the carrier plate 50 is linked to the second surface 13 of the circuit carrier 10 by means of a heat-conducting material 51.

    [0067] An electrical linking of the semiconductor chip 31 to the conductor trace structure of the first connection layer 14 of the circuit carrier 10 is effected by means of bonding wires 35, 37 and assigned connection elements 34, 36, which are electrically connected by their free ends to assigned connection pads 19, 20 by means of a respective solder layer 38, 39. The semiconductor chip 31 and the bonding wires 35, 37 and also the heat sink 33 are arranged in a housing 41, which is generally formed from an injection-molded material. The method according to the invention and the circuit carrier according to the invention are also suitable for differently constructed power components. By way of example, the power component may be one of the following components: capacitor, coil, power transistor, thyristor.

    [0068] In order, firstly, to be able to conduct the currents generated during the operation of the component 30 with low resistance and, secondly, also to be able to perform a good lateral distribution of the heat emitted by the component 30—in particular by the semiconductor chip 31—during operation, at least the connection pads 19, 20, conductor trace structures electrically connected thereto and also the heat spreading area 21 of the circuit carrier are reinforced with additional electrically conductive material. The reinforcement is carried out by plasma spraying, such that a greater layer thickness is obtained in comparison with the predefined layer thickness of the conventionally produced connection layer 14. This is evident by way of example in FIGS. 2a, 2b, 3a and 3b.

    [0069] FIGS. 2a and 2b show a cross-sectional illustration and a plan view of a conventional circuit carrier 10, in which the first connection layer, arranged on the first surface 12, and provided for example for the production of the circuit carrier 10, is not yet reinforced with additional electrically conductive material. Conductor traces which carry logic signals and are assigned to a logic circuit are identified by the reference sign 22. The two conductor traces 23, running parallel for example, are assigned to a power circuit (not illustrated in more specific detail). The conductor traces 22, 23 may have kinks and bends. The invention is not restricted to the rectilinear form chosen merely to simplify the figures.

    [0070] In a conventional circuit carrier, as is evident from the cross-sectional illustration in FIG. 2a, the conductor traces 22 and 23 are of identical height, that is to say that they have the same layer thickness. By contrast, it is readily evident that, for carrying the significantly greater currents, the conductor traces 23 have a significantly greater width then the conductor traces 22. However, problems described further above thus arise during production.

    [0071] By contrast, FIGS. 3a and 3b show a circuit carrier 10 embodied according to the invention. Here, too, the illustration shows the first connection layer 14 on the first surface 12 of the circuit carrier 10. The first connection layer 14 once again comprises conductor traces 22 for a logic circuit (not illustrated in more specific detail) and conductor traces 23 for a power circuit (likewise not illustrated in more specific detail) for the shaping of which the explanations above are likewise applicable.

    [0072] As is evident in the direct comparison of FIGS. 2b and 3b, the conductor traces 23 for the power circuit are configured such that they are significantly narrower, by way of example. It is evident from the cross-sectional illustration in FIGS. 2a and 3a, however, that the cross section required for carrying a corresponding current is realized by applying an additional material 25 on the material 24 of the connection layer with predefined layer thickness. Conductor traces 23 of greater width—as illustrated in FIG. 2a—are also usable for the method according to the invention. A particularly high current-carrying capacity and heat spreading can be realized in this case.

    [0073] Applying the additional material is carried out by plasma coating, i.e. by a plasma spraying process. It is thereby possible to obtain layer heights for the conductor trace 23 of between 0.5 mm and 1.0 mm and conductor trace widths of between 2.0 mm and 3.0 mm (or even wider still). While copper is preferably used as material for the production of the first connection layer 14, the additional material 24 applied by the plasma spraying process can be selected according to the requirements. By way of example, likewise copper or alternatively aluminum or bronze can be used. Preferably, the additionally applied material 24 is ductile, such that use on flexible circuit boards is also made possible.

    [0074] Applying the additional material by means of the plasma spraying process is preferably implemented on a structure of the relevant connection layer that was produced previously by means of a conventional production process (i.e. in particular a structure having a layer thickness of 30 μm to 35 μm and a conductor trace width of approximately 100 μm), and is therefore oriented to the geometry thereof. It is nevertheless possible also to apply additional material 24 going laterally beyond the width of a previously produced conductor trace. In particular, it is even possible to apply additional material on a soldering resist that is typically applied areally on the circuit carrier for terminating and protecting the first and/or second connection layer. If the additional material applied on a soldering resist is applied areally, then it can perform an electromagnetically shielding function. Alternatively, the additional material on the soldering resist of the circuit carrier can be used as an additional layout plane.

    [0075] The great flexibility of the plasma spraying process enables a subsequent adaptation of the circuit structure. By way of example, it is possible to produce electrical connections between respective connection pads of the first connection layer 14 and/or of the second connection layer 15. By way of example, configurations in the manner of a “jumper” can be performed as a result.

    [0076] There is the possibility of so-called pad adaptation in components. By way of example, in large passive components, such as e.g. coils, different connection pad configurations (so-called footprints) can be individually adapted by means of the plasma spraying process. Changing the circuit board layout, which may be associated for example with the production of new photolithography masks, is advantageously not necessary for this purpose.

    [0077] The plasma coating can also be used for selectively altering conductor trace structures of connection layers arranged internally in the circuit carrier. For this purpose, it is necessary to modify the conventional process for producing a standard circuit board by the connection of respective layers being preceded by a processing of the internally located connection layers by plasma coating. As a result, by way of example, it is possible to increase the current-carrying capacity between two components or between a component and a plug as interface toward the outside. Likewise, additional electrically conductive material can partially be provided under a component in order to obtain a better buffering and heat spreading internally in the circuit carrier.

    [0078] The technique of plasma coating can be employed in the case of flexible, in particular, deep-milled circuit boards in the region having a reduced number of layers, i.e. in the bending region. As a result, it is possible to increase the current-carrying capacity between circuit board portions connected by a flexible portion.