SEMICONDUCTOR DEVICE AND A METHOD OF MANUFACTURE

Abstract

A semiconductor device including a lead frame, a die attached to the lead frame using a first solder, and a clip attached to the die using a second solder is provided. The clip includes a notch arranged for a check of the excess of the second solder.

Claims

1. A semiconductor device comprising: a lead frame, a die attached to the lead frame using a first solder, a clip attached to the die using a second solder, wherein the clip comprises a notch arranged for a check of an excess of the second solder.

2. The semiconductor device as claimed in claim 1, wherein the notch has a shape that is rectangular or a half-circle.

3. The semiconductor device as claimed in claim 1, wherein the notch is made by a copper stamping or by an etching process.

4. The semiconductor device as claimed in claim 2, wherein the notch is made by a copper stamping or by an etching process.

5. The semiconductor device as claimed in claim 2, wherein the shape of the notch is a half-circle and wherein the half-circle has a radius that is of a same or similar size as a thickness of the clip.

6. The semiconductor device as claimed in claim 5, wherein the radius of the half-circle and the thickness of the clip are each about 0.2 mm.

7. The semiconductor device as claimed in claim 1, wherein the semiconductor device is a transistor, and wherein the transistor further comprises a source, a gate and a drain, wherein the notch is positioned between the source and the drain, and between the gate and the drain.

8. The semiconductor device as claimed in claim 1, wherein the semiconductor device is a transistor, wherein the transistor further comprises a source, a gate and a drain, and wherein the notch is positioned between the source and the drain, or between the gate and the drain.

9. The semiconductor device as claimed in claim 7, wherein the transistor is a MOSFET device.

10. The semiconductor device as claimed in claim 8, wherein the transistor is a MOSFET device.

11. A method of producing a semiconductor device, the method comprising the steps of: forming a lead frame; attaching a die to the lead frame using a first solder; and attaching a clip to the die using a second solder, wherein the clip comprises a notch arranged for a check of an excess of the second solder.

12. The method of producing a semiconductor device as claimed in claim 11, wherein the notch has a shape that is rectangular or a half-circle.

13. The method of producing a semiconductor device as claimed in claim 11, wherein the notch is made by a copper stamping or by an etching process.

14. The method of producing a semiconductor device as claimed in claim 12, wherein the notch is made by a copper stamping or by an etching process.

15. The method of producing a semiconductor device as claimed in claim 12, wherein the shape of the notch is a half-circle, and wherein the half-circle has a radius that is of a same or similar size as a thickness of the clip.

16. The method of producing a semiconductor device as claimed in claim 15, wherein the radius of the half-circle and the thickness of the clip each are about 0.2 mm.

Description

BRIEF DESCRIPTION OF THE DRAWINGS

[0017] So that the manner in which the features of the present disclosure can be understood in detail, a more particular description is made with reference to embodiments, some of which are illustrated in the appended figures. It is to be noted, however, that the appended figures illustrate only typical embodiments and are therefore not to be considered limiting of its scope. The figures are for facilitating an understanding of the disclosure and thus are not necessarily drawn to scale.

[0018] Advantages of the subject matter claimed will become apparent to those skilled in the art upon reading this description in conjunction with the accompanying figures, in which like reference numerals have been used to designate like elements, and in which:

[0019] FIGS. 1a and 1b show a known MOSFET device wherein an excessive solder is dispensed on the top of the die.

[0020] FIGS. 2a, 2b and 2c show a top view, an isometric view and a side view respectively of a known MOSFET device.

[0021] FIGS. 3a and 3b show known MOSFET devices with solder inspection holes.

[0022] FIGS. 4a, 4b and 4c show a top view, an isometric view and a side view respectively of a semiconductor device according to an embodiment of the disclosure.

[0023] FIG. 5 shows a method of manufacturing of a semiconductor device according to an embodiment of this disclosure.

DETAILED DESCRIPTION

[0024] An embodiment of the disclosure is shown in FIGS. 4a, 4b and 4c. These Figures show a top view, an isometric view and a side view respectively of a semiconductor device 100, i.e. a MOSFET device, an insulated gate bipolar transistor, a bipolar transistor, a JFET device, a thyristor, a diode, and the like.

[0025] The semiconductor device 100 comprises a lead frame 102, and a die 106 attached to the lead frame 102 using a first solder 104. A clip 120 is attached to the die 106 using a second solder 116. The clip 120 comprises a notch 200 arranged for a check of the excess of the second solder 116. In the example shown in FIGS. 4a, 4b and 4c, the notch 200 is a side notch. Having such a notch 200 feature enables easy visual inspection of the excess of the second solder 116 in a relatively simple way, i.e. without the use of an expensive x-ray machine.

[0026] The side notch 200 can have different shapes, for example a rectangular shape, a half circle shape (as illustrated in the example embodiment in FIGS. 4a, 4b and 4c), etc. The notch 200 can be created by a through copper stamping, by an etching process, etc. If the notch 200 is of a half circle shape, in a preferred example embodiment a minimum size of the radius of the half circle shape is the same size as the thickness of the clip 120. The clip 120 can me made of copper. In a preferred embodiment of the disclosure the size of this radius and the thickness of the clip 120 are around 0.2 mm, or similar.

[0027] It is recommended to provide such a notch 200 in the places where the excess of the solder should be checked. In an example embodiment of this disclosure the notch 200 is placed between the source potential and the gate potential of the semiconductor device 100 from one side and an edge of the die 106 from other side. This edge of the die 106 corresponds to the drain potential of the semiconductor device. Within the production of the semiconductor device 100, due to the present of the notch 200, a machine operator will be able to stop a possible excess of the solder and consequently to adjust a dissension of the solder immediately.

[0028] The notch 200 is particularly designed not to reduce the width of the clip 120, so to secure that the the spreading resistance on the source terminals of the semiconductor device 100 is maintained.

[0029] By introducing the notch 200 in the clip 120, the problems of the prior art described above are solved. An operator can visually judge if the solder is excessive. There is no need to use other expensive and inefficient methods mentioned above, such as a x-ray inspection of the semiconductor device. Thus, the implementation of this disclosure clearly saves costs and prevents possible quality issues that can be caused by the excess of the solder.

[0030] As it is shown in the example embodiment in FIGS. 4a and 4b, the notch 200 is provided on the clip 120 for the source of the semiconductor device and also on the clip 120 for the gate of the semiconductor device. This is particularly advantageous for the MOSFET devices that required a lower spreading resistance, and the notch 200 according to an embodiment of the disclosure supports such a lower spreading resistance. The notch will not contribute an increase of the package resistance since the notch 200 does not make the width of the clip 120 significantly narrower.

[0031] Another advantage of using the notch 200 is it can be done by a copper stamping process, which is a relatively cheap in terms of the mass production compared to the use of a chemical etching process which can be 10 times more costly. The copper stamping process is not suitable for a narrow width of the clip, but it is suitable for the notch according to an embodiment of this disclosure since the width of the clip is wide enough.

[0032] A method of manufacturing a semiconductor device according to an embodiment of the disclosure is shown in FIG. 5.

[0033] The method comprises the steps: [0034] step 301: providing a lead frame 102 which can be stamped or etched bottom [0035] step 303: print, write or dispense a first solder 104 on the lead frame 102 [0036] step 305: forming a die 106 attached to the lead frame 102 using a first solder 104 [0037] step 307: print, write or dispense a second solder 116 on the die 106 [0038] step 309: forming clips 120 comprising a notch 200 and attaching the clips 120 on top of the silicon die 106; the clips 120 contain source and gate terminals; a dambar 124 is connecting these terminals; so assembled parts will then go towards a reflow process to cure the solidify or to cure the solder applied [0039] step 311: perform a moulding of the cured and assembled device from the previous step, so to encapsulate the silicon with an encapsulant 122; an encapsulation is required to protect the silicon dies from any oxidation and contamination; the product will further undergo tin (Sn) plating process after moulding so to plate external leads in order to protect the copper from oxidation [0040] step 313: perform trim/form/singulation (TFS) process wherein some parts of the lead frames and clips will be removed to make the final semiconductor device [0041] step 315: perform cut of the dambar 124, wherein the singulated semiconductor device is created

[0042] The step 315 as shown in FIG. 5 is a top view of the singulated semiconductor device. Items 317 and 319 in FIG. 5 show an isometric view and a side view respectively of this singulated semiconductor device wherein inner layers are visible.

[0043] Particular and preferred aspects of the disclosure are set out in the accompanying independent claims. Combinations of features from the dependent and/or independent claims may be combined as appropriate and not merely as set out in the claims.

[0044] The scope of the present disclosure includes any novel feature or combination of features disclosed therein either explicitly or implicitly or any generalisation thereof irrespective of whether or not it relates to the claimed disclosure or mitigate against any or all of the problems addressed by the present disclosure. The applicant hereby gives notice that new claims may be formulated to such features during prosecution of this application or of any such further application derived therefrom. In particular, with reference to the appended claims, features from dependent claims may be combined with those of the independent claims and features from respective independent claims may be combined in any appropriate manner and not merely in specific combinations enumerated in the claims.

[0045] Features which are described in the context of separate embodiments may also be provided in combination in a single embodiment. Conversely, various features which are, for brevity, described in the context of a single embodiment, may also be provided separately or in any suitable sub combination.

[0046] The term “comprising” does not exclude other elements or steps, the term “a” or “an” does not exclude a plurality. Reference signs in the claims shall not be construed as limiting the scope of the claims.