USER STATION FOR A SERIAL BUS SYSTEM AND METHOD FOR TRANSMITTING DATA IN A SERIAL BUS SYSTEM

Abstract

A user station for a serial bus system. The user station includes a transceiver unit for serially transmitting a message on a bus line to at least one further user station of the bus system or for serially receiving a message from the bus line. The transceiver unit is designed, in the event in which the transceiver unit does not operate as the transmitter of the received message, to generate, if needed, a first or a second bus level on the bus line, and the transceiver unit is designed, in the event in which the transceiver unit operates as the transmitter of the received message, to generate instead of the first or second bus level a third bus level, which is lower than the bus level replaced by the third bus level, but again is one of two bus levels distinguishable in the bus system on the bus line.

Claims

1-12. (canceled)

13. A user station for a serial bus system, comprising: a transceiver unit configured to serially transmit a message on a bus line to at least one further user station of the bus system or to serially receive a message, the transceiver unit being configured to, in the event in which the transceiver unit does not operate as a transmitter of a received message, to generate, if needed, a first bus level or a second bus level on the bus line, and the transceiver unit is configured to, in the event in which the transceiver unit operates as the transmitter of the received message, to generate instead of the first bus level or second bus level, a third bus level, which is lower than a bus level replaced by the third bus level, but is one of two bus levels distinguishable in the bus system on the bus line.

14. The user station as recited in claim 13, wherein the transceiver unit is configured to generate as a bus level, a dominant bus level or a recessive bus level depending on a logic state of the message to be transmitted, and the transceiver unit is configured to transmit the dominant bus level on the bus line by actively driving a differential voltage state, and for the recessive bus level, not to drive the differential voltage state or to drive it weaker than the dominant bus level on the bus line.

15. The user station as recited in claim 14, wherein the transceiver unit is configured to, in the event in which the transceiver unit operates as the transmitter of the received message, generate the differential voltage state on the bus line for the recessive bus level as a negative voltage state.

16. The user station as recited in claim 13, wherein the transceiver unit is configured to distinguish a data phase in the message, in which useful data of the message are transmitted, from an arbitration phase, in which it is negotiated which of the user stations operates as the transmitter in a next data phase.

17. The user station as recited in claim 16, wherein the transceiver unit is configured to switch at a start of the data phase to an operating mode, in which the third bus level is generated for a message to be transmitted.

18. The user station as recited in claim 16, wherein the transceiver unit is configured to both to replace a first recessive bus level with a second recessive bus level and replace a first dominant bus level with a second dominant bus level in the data phase of a message to be transmitted.

19. The user station as recited in claim 16, wherein the transceiver unit is designed to reduce at the start of the data phase a first bit time, with which bits in the arbitration phase are generated to a second bit time, with which bits in the data phase are generated.

20. The user station as recited in claim 13, wherein the user station is configured for a bus system, in which an exclusive, collision-free access of a user station to a bus line of the bus system is at least temporarily ensured.

21. The user station as recited in claim 20, wherein the transceiver unit is designed to generate the third bus level only if the transceiver unit has the exclusive, collision-free access to the bus line.

22. The user station as recited in claim 13, wherein the message is a CAN message or a CAN FD message.

23. A bus system, comprising: a bus line; and at least two user stations interconnected via the bus line in such a way that they are able to communicate with one another, at least one of the at least two user stations including: a transceiver unit configured to serially transmit a message on a bus line to at least one further user station of the bus system or to serially receive a message, the transceiver unit being configured to, in the event in which the transceiver unit does not operate as a transmitter of a received message, to generate, if needed, a first bus level or a second bus level on the bus line, and the transceiver unit is configured to, in the event in which the transceiver unit operates as the transmitter of the received message, to generate instead of the first bus level or second bus level, a third bus level, which is lower than a bus level replaced by the third bus level, but is one of two bus levels distinguishable in the bus system on the bus line.

24. A method for transmitting messages in a serial bus system including a transceiver unit, which is configured to serially transmit a message on a bus line to at least one further user station of the bus system and to serially receive a message from the bus line, the method comprising: serially transmitting using the transceiver unit on the bus line in such a way that the transceiver unit, in the event in which the transceiver unit does not operate as the transmitter of a received message, generates, if needed, a first bus level or a second bus level on the bus line, and the transceiver unit, in the event in which the transceiver unit operates as the transmitter of the received message generates instead of the first bus level or the second bus level, a third bus level which is lower than a bus level replaced by the third bus level, but is one of two bus levels distinguishable in the bus system on the bus line.

Description

BRIEF DESCRIPTION OF THE DRAWINGS

[0024] The present invention is described in greater detail below with reference to the figures and based on exemplary embodiments.

[0025] FIG. 1 shows a simplified block diagram of a bus system according to a first exemplary embodiment of the present invention.

[0026] FIG. 2 shows a diagram for illustrating the structure of messages, which may be transmitted by user stations of the bus system according to the first exemplary embodiment of the present invention.

[0027] FIG. 3 shows a representation of one example of a temporal profile of a differential voltage VDIFF of bus signals CAN H and CAN L for a portion of the message in a transceiver unit of the bus system according to the first exemplary embodiment of the present invention.

[0028] FIG. 4 shows a representation of one example of a temporal profile of a differential voltage VDIFF of bus signals CAN H and CAN L for a portion of a message in a transceiver unit of a bus system according to a second exemplary embodiment of the present invention.

[0029] In the figures, identical or functionally identical elements are, unless otherwise indicated, provided with the same reference numerals.

DETAILED DESCRIPTION OF EXAMPLE EMBODIMENTS

[0030] FIG. 1 shows by way of example a serial bus system 1, which may be designed as an arbitrary serial bus system. Bus system 1 is, in particular, a CAN bus system, a CAN FD bus system, a FlexRay bus system, a bus system for Ethernet, a Gigabit Ethernet, etc. Bus system 1 is usable in a vehicle, in particular, in a motor vehicle, in an aircraft, etc., or in the hospital, etc.

[0031] Bus system 1 in FIG. 1 has a bus line 3 designed, in particular, as a two-wire line, to which a multitude of user stations 10, 20, 30 are connected. Messages 4, 5 are serially transmittable via bus line 3 in the form of signals between individual user stations 10, 20, 30. User stations 10, 20, 30 are arbitrary devices intended to serially exchange data with one another such as, for example, control units, sensors, display devices, etc., of a motor vehicle. Alternatively, user stations 10, 20, 30 are, for example, computers of a computer network or components of an automation network, in particular, for an industrial plant. User stations 10, 20, 30 are, however, not limited to the specific examples cited.

[0032] The present invention is described by way of example below based on the CAN bus system and CAN FD bus system. However, the present invention is not limited thereto; rather the present invention may be applied to an arbitrary serial bus system.

[0033] As shown in FIG. 1, user station 10 has a communication control unit 11 and a transceiver unit 12. User station 20, by contrast, has a communication control unit 21 and a transceiver unit 22. User station 30 has a communication control unit 31 and a transceiver unit 32. Transceiver units 12, 22, 32 of user stations 10, 20, 30 are each directly connected to bus line 3, even though this is not illustrated in FIG. 1.

[0034] Communication control units 11, 21, 31 are each used to control a communication of respective user station 10, 20, 30 via bus line 3 with another user station of user stations 10, 20, 30, which are connected to bus line 3.

[0035] Communication control unit 11 for the example of the CAN bus system may, with the exception of the differences described in greater detail below, be designed as a conventional CAN controller. In this case, communication control unit 11 creates and reads first messages 4, for example modified Classic CAN messages 4. Classic CAN messages 4 are, with the exception of the following described modifications, structured according to the classic basic format, in which a number of up to 8 data bytes may be included in message 4, as shown in the upper portion of FIG. 2.

[0036] Communication control unit 21 in FIG. 1, may, for the example of the CAN bus system, with the exception of the differences described in greater detail below, be designed as a conventional CAN FD controller. In this case, communication control unit 21 creates and reads second messages 5, which are modified Classic CAN FD messages 5, for example. Classic CAN messages 5 in this case are, with the exception of the following described modifications, structured on the basis of a CAN FD format, in which a number of up to 64 data bytes may be included in message 5, as shown in the lower portion of FIG. 2. Depending on the need, however, optionally more than 64 data byes are transmittable in message 5.

[0037] Communication control unit 31 may be designed for the example of the CAN bus system in order, depending on the need, to provide a modified Classic CAN message 4 or a modified CAN FD message 5 for, or to receive them from, transceiver unit 32. Communication control unit 21 thus creates and reads a first message 4 or second message 5, first and second message 4, 5 differing in terms of their data transmission standard, namely, in this case modified CAN or modified CAN FD.

[0038] Thus, transceiver unit 12 may, with the exception of the differences described in greater detail below, be designed as a conventional CAN transceiver. Transceiver unit 22 may, with the exception of the differences described in greater detail below, be designed as a conventional CAN FD transceiver. Transceiver unit 32 may be designed, depending on the need, to provide for, or to receive from, communication control unit 31 messages 4 according to the modified CAN basic format or messages 5 according to the modified CAN FD format.

[0039] A formation and then transmission of messages 5 with the modified CAN FD or also at higher data rates than CAN FD is implementable using the two user stations 20, 30.

[0040] FIG. 2 shows in its upper portion for message 4 a CAN frame 45 as it is transmitted by transceiver unit 12 or transceiver unit 13, and in its lower portion for message 5 a CAN FD frame 450 as it may be transmitted by transceiver unit 22 or 32. For the CAN communication on bus line 3, CAN frame 45 and CAN FD frame 450 are subdivided basically into two different phases or areas, namely arbitration phases 451, 453 and a data area 452, which in Classical CAN is also referred to as data field or in CAN FD also as data phase 452. The useful data of the CAN FD frame or of message 5 are contained in data phase 452.

[0041] In arbitration phase 451, it is negotiated between two or more transmitters that have simultaneously started messages 4, 5, which of the transmitters subsequently has at least temporarily an exclusive, collision-free access to bus line 3. The transmitter that transmits a recessive bit (logic state ‘1’) during the arbitration and sees instead a dominant bit (logic state ‘0’) on the bus or bus line 3, loses the arbitration and becomes the receiver of ongoing message 4 or of message 5. The arbitration is won by the transmitter whose messages 4, 5 contain the most leading ‘0’ bits. The winner of the arbitration notes no access conflict for bus line 3. Thus, no collision results and therefore no destruction of transmitted messages 4, 5, which is why the arbitration and the following communication take place in a non-destructive manner.

[0042] As shown in FIG. 2, the bit rate for following data phase 452 is increased in CAN FD at the end of arbitration phase 451 to, for example, 2, 4 8 Mbps as compared to classic CAN. This means that in CAN FD, the bit rate in arbitration phases 451, 453 is lower than the bit rate in data phase 452. In CAN FD, data phase 452 of CAN FD frame 450 is temporally significantly reduced compared to data phase 452 of CAN frame 45.

[0043] In a serial bus system without arbitration 451, 453 such as, for example, Ethernet, FlexRay, etc., two data phases 452 directly follow one another.

[0044] If one of user stations 10, 20, 30 of FIG. 1 recognizes an error in a message 4, 5, for example, a violation of the bit stuffing rule or an error in the checksum, in particular, CRC error (CRC=cyclic redundancy check), this user station 10, 20, 30 overwrites message 4, 5 recognized as erroneous with an error detection or error flag. The error flag is made up of six dominant bits. All other user stations 10, 20, 30 recognize these six successive dominant bits as a format error or as a violation of the bit stuffing rule, according to which a bit inverse thereto is to be inserted in a message 4, 5 after five identical bits.

[0045] An error free message 4, 5 is confirmed by the receivers via an acknowledge bit. For this purpose, the receivers drive a dominant bit in an acknowledge slot recessively transmitted by the transmitter. Except for the acknowledge slot, the transmitter of a message 4, 5 expects to always see on the bus or on bus line 3 the level that the transmitter itself transmits. Otherwise, it recognizes a bit error. In the event of a bit error (apart from the loss of the arbitration) the transmitter considers transmitted messages 4, 5 to be invalid.

[0046] Invalid and therefore unsuccessful messages 4, 5 are repeated by the transmitter.

[0047] Transceiver units 12, 22, 32 as receivers convert the previously described differential bus levels into logic bit levels, i.e., 0 and 1. As transmitters, transceiver units 12, 22, 32, convert the logic bit levels into the differential bus levels shown in FIG. 3.

[0048] FIG. 3 illustrates the transition between arbitration phase 451 and data phase 452 as an example of various communication phases of a message 5 based on a differential voltage VDIFF over time t. For a message 4, the following statements are optionally equally applicable.

[0049] Message 5 is generated in arbitration phase 451 with previously described differential bus levels 471, 481 via the two-wire bus line as bus line 3. In other words, differential voltage VDIFF forms differential voltage states for signals CAN H and CAN L, which are generated separately by transceiver units 12, 22, 32 on the two wires of bus line 3.

[0050] Recessive bus level 471, which is designated as logic ‘1’ in FIG. 3, but is measurable as a first specific voltage value, is not driven by bus user stations 10, 20, 30, but is determined by a terminating resistor of bus line 3. In contrast, dominant bus level 481 is actively driven. Dominant bus level 481 is represented in FIG. 3 as logic ‘0’, but also measureable as a second specific voltage value. Bus levels 471, 481 are distinguishable from one another as two different bus levels or voltage values for logic ‘1’ and logic ‘0’.

[0051] In other words, in the previously described first operating mode of one of transceiver units 12, 22, 32, logic ‘0’ is driven as dominant bus level 481. In the first operating mode for logic ‘1’, i.e., for recessive bus state 471, however, the bus or the voltage state is not driven on bus line 3. The terminal resistors cause recessive bus level 471 to adjust.

[0052] As shown in FIG. 3, the bits of message 5 are transmitted in arbitration phase 451 with differential bus levels 471, 481 and with a bit time T1 via bus line 3. In contrast thereto, the bits of message 5 are transmitted in data phase 452 with differential bus level 471, 482 and with a bit time T2 via bus line 3. Bit time T1 is longer than bit time T2. Thus, the bits in data phase 452 are transmitted at a higher or faster bit rate than in arbitration phase 451.

[0053] For this purpose, the level for the recessive bus level is switched at the start of data phase 452 of message 5 at the BRS bit, which follows an FDF bit and a Res bit at the end of arbitration phase 451. The bit rate is also switched at the BRS bit. The method described is, however, not bound to one particular message format for the serial transmission.

[0054] In data phase 452, the weaker driven negative differential voltage VDIFF corresponding to bus level 472 is then used instead of previous recessive bus level 471. However, bus levels 472, 481 are also distinguishable from one another as two different bus levels or voltage values for logic ‘1’ and logic ‘0’.

[0055] Thus, when transmitting message 5 in the previously described second operating mode of one of transceiver units 12, 22, 32, transmitting user station 10, 20, 30 also drives recessive bus level 472, even if weaker than dominant bus level 482. This negative differential voltage VDIFF, a third specific voltage value, is also recognized by existing transceiver units such as, for example, transceiver unit 12 of user station 10 as a recessive bus level, logic ‘1’.

[0056] Only the transmitter of a message 5 switches its transceiver unit 12, 22, 32 in data phase 452 from previous bus level 471 for logic ‘1’, i.e., the recessive bus level in arbitration phase 451, to new bus level 472 for logic ‘1’ or from the first operating mode into the second operating mode. In contrast, the receivers of message 5 do need not to switch their bus levels 471.

[0057] By way of example of the CAN FD protocol, the suitable point in time for switching recessive bus level 471, 472 of the transmitter would be the start and the end of data phase 452. In arbitration phase 451 of message 5 on the other hand, the normally recessive and dominant bus levels 471, 481 are used as illustrated in FIG. 3 and previously described.

[0058] If a receiver of message 5 recognizes an error, non-switched transceiver unit 12, 22, 32, of this receiver may then overwrite weakly driven logic ‘1’ level, i.e., bus level 472 of the transmitter, with a dominant error detection (error flag). Thus, the handling of errors by, for example, the CAN protocol remains possible.

[0059] The numerical value for new or second recessive bus level 472 is established as a function of the specified limits for the length of bus line 3, of the number of user stations 10, 20, 30 of bus system 1 and of the bit rate(s) desired for the respective application, in each case with respect to the numerical values for bus level 471, 481 in arbitration phase 451. In CAN, recessive bus levels 471, 472 may, according to the ISO 11898-2, be selected as VDIFF in the range of −1.0V to 0.5V, dominant bus levels 481, 482 as VDIFF in the range of 0.9V to 5V.

[0060] Thus, at least one of transceiver units 12, 22, 32 may for a case, in which transceiver unit 12, 22, 32 does not operate as transmitter of received message 5, generate, if needed, first or second bus level 471, 481 on bus line 3. In the event, in which transceiver unit 12, 22, 32 operates, however, as the transmitter of received message 5, transceiver unit 12, 22, 32 generates instead of bus level 471 a third bus level, namely the more minor bus level 472. In the process, third bus level 472 is in turn designed in such a way that bus level 472 and bus level 482 are again two bus levels distinguishable in bus system 1.

[0061] Thus, a method is carried out by at least one of user stations 10, 20, 30, more precisely, by one of transceiver units 12, 22, 32, in which transceiver unit 12, 22, 32 is switched during a message 5, so that they use other bus levels 472, 481 in data phase 452, which are less asymmetrical than bus levels 471, 481 in arbitration phase 451.

[0062] In this way, faster or higher bit rates in bus system 1 with compatibility to previous user stations 10, 20 are possible. This is also advantageous with a view to a successive expansion and/or renewal of an already existing bus system 1.

[0063] FIG. 4 shows with respect to a second exemplary embodiment the area at the end of arbitration phase 451 and at the start of a data phase 452 for a message 50. Here, too, differential voltage VDIFF is again shown over time t with differential symmetrical bus levels 471, 472, 481 via a second two-wire bus line as bus line 3, as previously described with respect to FIG. 3.

[0064] In contrast to FIG. 3, a second dominant bus level 482 is also used in the second exemplary embodiment. In this case, bus levels 472, 482 are also distinguishable from one another as two different bus levels or voltage values for logic ‘1’ and logic ‘0’.

[0065] For this purpose, the transmitter of a message 50 in data phase 452 optionally drives the transmission level for dominant bits (with a positive differential voltage VDIFF), i.e., a second dominant bus level 482, less intensively than in arbitration phase 451 for first dominant bus level 481. However, second dominant bus level 482 continues to be driven intensively enough that transceiver units 12, 22, 32 of the receiver of message 50 recognize bus level 482 reliably as dominant logic ‘0’. Reduced bus level 482 for logic ‘0’ also reduces the emissions.

[0066] Otherwise, the same applies as previously described in conjunction with FIG. 3.

[0067] According to a third exemplary embodiment, only dominant bus level 481 in data phase 452 as compared to arbitration phase 451 is lowered by the transmitters of a message 50 to dominant bus level 482, but not recessive bus level 471. Thus, bus levels 471, 481 in this case are used in arbitration phase 451, but bus levels 471, 482 are used in data phase 452.

[0068] Otherwise, the same applies as previously described in conjunction with FIG. 3 and FIG. 4.

[0069] All previously described embodiments of bus system 1, of user stations 10, 20, 30 and of the method carried out by user stations 10, 20, 30 may be used individually or in all possible combinations. All features of the previously described exemplary embodiments and/or of their embodiment variants and/or of their modifications may, in particular, be arbitrarily combined. In addition or alternatively, the following modifications, in particular, are possible.

[0070] Previously described bus system 1 according to the exemplary embodiments is described with reference to a bus system based on the CAN protocol. Bus system 1 according to the exemplary embodiments may, however, also be a different type of serial communication network. It is advantageous, though not necessarily a prerequisite, that in bus system 1 an exclusive, collision-free access of a user station 10, 20, 30 on a shared channel is ensured, at least for particular time periods.

[0071] The number and arrangement of user stations 10, 20, 30 in bus system 1 of the exemplary embodiments is arbitrary. User station 10 may, in particular, be omitted in bus system 1. It is possible that one or multiple user stations 10 or 20 or 30 are present in bus system 1.