Antenna Module
20210234256 · 2021-07-29
Inventors
- Christof LANDESBERGER (Munchen, DE)
- Peter RAMM (Munchen, DE)
- Nagarajan PALAVESAM (Munchen, DE)
- Josef WEBER (Munchen, DE)
Cpc classification
H01Q1/2283
ELECTRICITY
H01Q15/0006
ELECTRICITY
H01Q1/02
ELECTRICITY
H01L23/42
ELECTRICITY
H01Q15/0086
ELECTRICITY
H01L2223/6627
ELECTRICITY
H01L21/481
ELECTRICITY
H01Q23/00
ELECTRICITY
H01L23/564
ELECTRICITY
H01L23/5226
ELECTRICITY
H01L2223/6677
ELECTRICITY
H01L21/4803
ELECTRICITY
International classification
H01Q1/22
ELECTRICITY
H01L21/48
ELECTRICITY
Abstract
An antenna module Includes a first substrate, a second substrate, the second substrate including at least one cavity at one of the first main surface. The first substrate includes at feast an RF antenna element and/or an RF chip and/or an RF conductive trace, which are arranged on the first main surface of the substrate. The first substrate is connected, with its first main surface, to the first main surface of the second substrate so that the RF elements project into the at least one cavity.
Claims
1. Antenna module, comprising the following features: a first substrate, a second substrate, said second substrate comprising at least one cavity at a first main surface: wherein the first substrate comprises at least an RF antenna element and/or an RF chip and/or an RF conductive trace, the RF antenna element and/or the RF chip and/or the RF conductive trace being arranged on or in a first main surface of the first substrate, wherein the RF antenna element and/or the RF chip and/or the RF conductive trace projects) out of the first main surface and/or into the at least one cavity, the first substrate being a high-resistance substrate, an insulating substrate and/or comprising a glass material, a ceramic material or a polymer material, the cavity comprising an electrically contacted cavity metallization exhibiting a reduced width.
2. Antenna module as claimed in claim 1, wherein the First substrate is connected, with its first main surface, to the first main surface of the second substrate.
3. Antenna module as claimed in claim 1, wherein several cavities are provided at the first main surface of the second substrate, which are associated with different RF elements.
4. Antenna module as claimed in claim 1, wherein the second substrate is formed by a substrate stack, or wherein the second substrate is formed by a substrate stack and the substrate stack comprises a substrate or a substrate which acts as a lid element for the cavity.
5. Antenna module as claimed in claim 1, wherein the second substrate comprises a conductive trace, a conductive trace on the first main surface, a conductive trace in the at least one cavity and/or a conductive trace on a bottom of the at least one cavity.
6. Antenna module as claimed in claim 1, wherein the connection between the first substrate and the second substrate is formed by an adhesive layer, an insulating adhesive layer or an insulating layer.
7. Antenna module as claimed in claim 1, wherein the second substrate comprises one or more vias or one or more vias which project through the second substrate.
8. Antenna module as claimed in claim 1, wherein the second substrate comprises a semiconductor material.
9. Antenna module as claimed in claim 1, wherein the cavity metallization extends across a partial area of the cavity or wherein the cavity metallization is patterned
10. Antenna module as claimed in claim 1, wherein the first substrate and/or the second substrate is formed by a thinned substrate.
11. Antenna module as claimed in claim 1, wherein the at least one cavity is filled with air, a gas or a vacuum.
12. Antenna module as claimed in claim 1, the antenna module comprising a meta material, a meta material in the at least one cavity, a meta material arranged on a bottom of the at least one cavity, and/or a meta material associated with the RF antenna element.
13. Antenna module as claimed in claim 1, wherein the antenna module comprises a thermal element, a thermal element in the at least one cavity, a thermal element arranged on a bottom of the at least one cavity, and/or a thermal element associated with the RF chip.
14. Antenna module as claimed in claim 1, wherein the second substrate is configured as a layer stack comprising at least two individual substrates; or wherein the second substrate is configured as a layer stack comprising at least two individual substrates, wherein a first one of said at least two individual substrates comprises one or more cavities and/or one or more openings extending through the first one of the at least two individual substrates, and the second one of the at least two individual substrates serves to encapsulate said one or more openings so as to form the one or more cavities.
15. Method of manufacturing an antenna module, comprising: providing a first substrate; providing a second substrate, said second substrate comprising at least one cavity at a first main surface, wherein the first substrate comprises at least an RF antenna element and/or an RF chip and/or an RF conductive trace, the RF antenna element and/or the RF chip and/or the RF conductive trace being arranged on a first main surface of the first substrate; and connecting the first substrate, with its first main surface, to the first main surface of the second substrate so that the RF antenna element and/or the RF chip and/or the RF conductive trace project(s) out of the first main surface and/or into the at least one cavity, the first substrate being a high-resistance substrate, an insulating substrate and/or comprising a glass material, a ceramic material or a polymer material, the cavity comprising an electrically contacted cavity metallization exhibiting a reduced width.
16. Method of manufacturing as claimed in claim 15, wherein connecting is implemented by means of flip-chip technology or face-to-face wafer bonding.
17. Method of manufacturing as claimed in claim 15, wherein providing the second substrate is preceded by patterning, etching, dry etching for incorporating the at least one cavity into the first main surface; and/or wherein providing of the first substrate and/or of the second substrate is preceded by semiconductor manufacturing so as to form an RF element, a conductive trace, a meta material, a thermal element, an RF conductive trace, an RF chip and/or an RF antenna element onto the first/or second substrate.
18. Method of manufacturing as claimed in claim 15, wherein the method comprises thinning the first substrate and/or the second substrate following connection.
Description
BRIEF DESCRIPTION OF THE DRAWINGS
[0030] Embodiments of the present invention will be detailed subsequently referring to the appended drawings, in which:
[0031]
[0032]
[0033]
[0034]
[0035]
DETAILED DESCRIPTION OF THE INVENTION
[0036] Embodiments of the present invention will be explained below with reference to the figures. Here, identical reference numerals will be used for Identical elements and structures, so that their descriptions are mutually applicable, or interchangeable.
[0037] On the first main surface 101, the first substrate 1 comprises at least an RF element. By way of example, two RF elements, namely an RF chip 4 and an RF antenna 3, are shown here, in accordance with embodiments, they may be formed in the main surface 101, or they may be formed on the main surface 101, as depicted here.
[0038] The substrate 5 comprises a cavity 5k provided on the sides of the first main surface 501. The cavity 5k enables the substrates 1 and 5 to be connected via their main surfaces 101 and 501 despite the one or more RF elements 3 and 4. To this end, the elements 3 and 4 project into the cavity 5k, From a lateral point of view, the elements 3 and 4 are associated, to this end, with the at least one cavity 5k. so that the elements 3 and 5 will be aligned to be lateral to the cavity following connection of the substrates. As depicted, the elements 3 and 5 project out of the main surface 101 and into the cavity 5k. To this end, the cavity is adapted, e.g. in terms of its depth, to the height of the elements 3 and 4.
[0039] As depicted in
[0040] As far as the manufacturing method is concerned, it shall be noted that the two substrates 1 and 5 are provided in a basic step and are then connected to each other in a further basic step. As a result, flip-chip mounting or face-to-face wafer bonding are suitable; different interconnection techniques such as adhesion or bonding are possible. This is why, in accordance with embodiments, a connecting layer such as an adhesive layer or an insulating adhesive layer or an insulating layer, for example, may be provided only also between the two substrates 1 and 5. Said layer insulates the surfaces 501 and 101 from each other at least at the points of contact, or connecting points. As was indicated above, standard semiconductor manufacturing methods may be employed, in accordance with embodiments, for manufacturing the glass substrate and/or the general insulating substrate 1. Thus, with this method, the chip-antenna connection is formed on an insulating substrate. By analogy therewith, the cavity, or the opening, of the second substrate 5 may also be introduced by means of standard manufacturing methods, e.g., dry etching.
[0041] A further embodiment will be explained below with reference to
[0042]
[0043] In addition to the RF chip 4, the substrate 1 has the RF antenna 3 as well as a feed line 2 applied to its main surface 101.
[0044] The substrate 5 comprises a cavity 13. In this embodiment, the cavity 13 is provided with a cavity metalization 7. The vertical walls may have feed lines located thereon. The feed line is designated by the reference numeral 7z and connects the cavity metalization 7 to, for example, the electrically conducting via 9. The latter projects from the first main surface 501 through the entire substrate 5 to the second mam surface 502. The second main surface 502 has a connector element, e.g., in the form of a solder ball 9l, provided thereon. As was already mentioned, the cavity metalization 7 is provided on the bottom of the cavity 19. Additionally, a meta material layer 8 may also be arranged on the bottom and/or on the cavity metallization 7. Meta materials are materials whose electrical and magnetic properties (permittivity ε.sub.r and permeability μ.sub.r) are variably adjustable. This is achieved, for example, by micro- and nano-patterning of conductive and non-conductive, or magnetic, coatings. With regard to the cavity metallization 7 and also to the meta material 8 it shall be noted that both elements may extend across the entire width of the cavity 13 or only across an area of the cavity 13. Here, a variant is shown where the cavity metallization extends across the entire width, and the meta material extends across a reduced width. This means, therefore, that in accordance with embodiments, the cavity metalization 7 may be patterned. For example, the bottom is patterned so as to influence the radiation behavior.
[0045] In the design state depicted here in
[0046] In
[0047] As can be seen, the RF elements 3 and 4 here are laterally arranged in the area of the cavity 13, whereas, e.g., the RF land may overlap the feed line also in the area located next to the cavity. It is within said area that an electrical connection may then be effected. This Is not depicted, but projects, e.g., through the insulating material 6. It shall also be noted at this point that the insulating material 6 may be provided in different thicknesses on this side and on the other side of the cavity so as to provide a corresponding height compensation at this point. What is advantageous about this arrangement is that the land for introducing the RF signal, e.g. the connection between 3 and 4, or the element 3, is also geometrically defined. In embodiments, the meta material 8 is provided laterally within the area of the antenna 3. This is why a meta material 8 having a reduced width results.
[0048] A further embodiment, wherein the elements 3 and 4 are provided for different cavities 13 and 14, will be explained below with reference to
[0049]
[0050] As depicted here, the depths of the cavities 14a and 14b may vary from each other, in accordance with embodiments. Here, the cavity 14b, which along with the RF antenna element 3 forms the cavity antenna, is formed to be deeper. It is via the depth that, e.g. also RF properties of the cavity antenna are set. The depth of the cavity 14a is selected such that the chip 4 projecting into the cavity 14a has sufficient space or is at least embedded.
[0051] The depth of the antenna cavity 14b may be adapted to the desired wavelength of the emitted or received wavelength. In some cases, the depth may amount to a quarter of the target wavelength, i.e., λ/4, for example. When meta materials are used, different values may be usefully employed for the depth of the cavity. It is an advantage that the inventive implementation enables variability of the cavity depth and that, thus, the performance (among others, energy efficiency) of the system may be optimized.
[0052] With reference to
[0053] The thinned layer stack is shown in
[0054] With regard to the embodiments of
[0055] In accordance with the above embodiments, emission of the mm waves is effected through the glass wafer 1. in order to minimize absorption losses within this context, the glass wafer 1 may be thinned/ground off. This, in turn, is possible in a reasonable manner specifically when the glass wafer 1 is stabilized during thinning. This is precisely what the bonded Si wafer 5 achieves within the wafer stack. The thinned glass substrate 1 is a perfect protection against environmental influences (humidity). All contacts are led out to the rear side or to the side via the TSV 9.
[0056] With regard to the above embodiments, it shall be noted that the second wafer 5, 5′ and/or 5′ advantageously consists of silicon; therefore, it offers all of the known patterning techniques of standard semiconductor technology; what is very important for the present case: manufacturing of precisely defined cavities (in the dry etching method) and TSV contacts through the wafer. What is also advantageous Is the high thermal conductivity of the Si wafer, which thus enables good heat dissipation from the RF chip. The chip is mounted on the conductive traces by using flip-chip technology; this avoids wire bonds and undesired inductances.
[0057] Embodiments of the present invention thus may be characterized as follows, electronic module 100, 200, 300, the electronic module comprising a non-conducting substrate 1 having an electronic component 4 mounted on the first substrate surface and an antenna 3 mounted on the first substrate surface, the electronic module comprising a semi-conducting substrate 5 having at least one cavity 13 in a first surface, and the first surface of the non-conducting substrate 1 being connected to the first surface of the semi-conducting substrate 5, so that the electronic component 4 and the antenna 3 project into the at least one cavity or into respectively separate cavities.
[0058] The entire package (chip+antenna) arises at the “wafer level”, i.e., at low cost with different integrated functionalities of processing and emitting/receiving RF signals. For frequencies above 100 GHz, it becomes particularly advantageous since the dimensions of the antenna now only amount to several millimeters, i.e. since many packages come into being on one wafer at the same time.
[0059] The manufacturing method may he described as follows: [0060] providing a non-conducting substrate 1 having an electronic component 4 mounted on the first substrate surface and having an antenna 3, or a conductive-trace structure 3, mounted on the first substrate surface. [0061] providing a substrate 5 (semi-conducting or insulating) having at least one cavity 13 in a first surface [0062] connecting the first surface of the non-conducting substrate 1 to the first surface of the semi-conducting substrate 5, so that the electronic component 4 and the antenna 3 project into the at least one cavity or into respectively separate cavities.
[0063] Even though some aspects have been described within the context of a device, It is understood that said aspects also represent a description of the corresponding method, so that a block or a structural component of a device is also to be understood as a corresponding method step or as a feature of a method step. By analogy therewith, aspects that have been described in connection with or as a method step also represent a description of a corresponding block or detail or feature of a corresponding device.
[0064] While this invention has been described in terms of several embodiments, there are alterations, permutations, and equivalents which fall within the scope of this invention. It should also be noted that there are many alternative ways of implementing the methods and compositions of the present invention. It is therefore intended that the following appended claims be interpreted as including all such alterations, permutations and equivalents as fall within the true spirit and scope of the present invention.