Integrated circuit chip packaging including a heat sink topped cavity
10818572 ยท 2020-10-27
Assignee
Inventors
Cpc classification
H01L2224/48472
ELECTRICITY
H01L2224/45014
ELECTRICITY
H05K2201/0919
ELECTRICITY
H01L2223/6627
ELECTRICITY
H05K1/183
ELECTRICITY
H01L23/49827
ELECTRICITY
H01L2924/00014
ELECTRICITY
H01L2924/00014
ELECTRICITY
H01L2924/15153
ELECTRICITY
H01L2224/48471
ELECTRICITY
H01L2224/16225
ELECTRICITY
H01L2224/45014
ELECTRICITY
H01L2224/16235
ELECTRICITY
H01L21/481
ELECTRICITY
H05K2201/092
ELECTRICITY
H01L24/73
ELECTRICITY
International classification
H01L23/36
ELECTRICITY
H05K1/18
ELECTRICITY
H01L25/16
ELECTRICITY
H01L23/498
ELECTRICITY
Abstract
An electrical circuit device includes a circuit board including a cavity extending from a top surface of the circuit board to an embedded conductor, an integrated circuit chip in the cavity, an electrical connection between the integrated circuit chip and the embedded conductor, a thermal slug disposed over a top surface of the integrated circuit chip, and a heat sink mounted to an outer surface of the thermal slug for transferring a thermal energy away from the circuit board, the heat sink extending above a top surface of the circuit board.
Claims
1. An electrical circuit device, comprising: a printed circuit board including a cavity extending from a top surface of the printed circuit hoard to an embedded conductor; an integrated circuit chip disposed in said cavity; an electrical connection between said integrated circuit chip and said embedded conductor; a thermal slug disposed over a top surface of said integrated circuit chip; and a heat sink mounted to an outer surface of the thermal slug for transferring a thermal energy away from the printed circuit board.
2. The device of claim 1, wherein a top surface of said integrated circuit chip is substantially co-planar with said embedded conductor.
3. The device of claim 1, wherein said cavity comprises a side surface with a step.
4. The device of claim 3, wherein a top surface of said step is aligned with another embedded conductor.
5. The device of claim 3, wherein a top surface of said step exposes said embedded conductor.
6. The device of claim 1, further comprising a plurality of connections each electrically connecting said integrated circuit chip to a corresponding one of a plurality of embedded conductors.
7. The device of claim 6, wherein one of said plurality of connections comprises one of a ball bond and a ribbon bond.
8. The device of claim 1, wherein said electrical connection comprises a ribbon bond.
9. The device of claim 1, wherein said electrical connection comprises a flip chip connection and a ball bond connection.
10. The device of claim 1, wherein the cavity extends from the top surface of said printed circuit board to a top surface of the embedded conductor.
11. The device of claim 10, wherein said printed circuit board is disposed on the top surface of said embedded conductor and on a bottom surface of said embedded conductor.
12. The device of claim 11, wherein the integrated circuit chip is disposed on a lower surface of said cavity inside said printed circuit board such that said printed circuit board extends below the integrated circuit chip and covers a side surface of the integrated circuit chip.
13. The device of claim 12, wherein said electrical connection between said integrated circuit chip and said embedded conductor comprises a ribbon bond.
14. The device of claim 13, further comprising: a plurality of connections each electrically connecting said integrated circuit chip to a corresponding one of a plurality of embedded conductors, which are embedded within the printed circuit board in addition to the embedded conductor.
15. The device of claim 14, wherein an upper one of said plurality of connections comprises a ball bond that connects said integrated circuit chip to an upper one of the plurality of embedded conductors.
16. The device of claim 15, wherein said each of the plurality of connections and each of the plurality of embedded conductors are located between the side surface of the integrated circuit chip and a flip chip package connected to the printed circuit board.
17. The device of claim 16, wherein the heat sink extends above a top surface of said printed circuit board.
18. The device of claim 16, wherein thermal slug is disposed on the top surface of said integrated circuit chip.
19. An electrical circuit device, comprising: an insulating layer; a plurality of conductors embedded in the insulating layer; a cavity extending from a surface of the insulating layer to a top surface of each of the plurality of conductors such that the top surface of said each of the plurality of conductors is exposed in the cavity; an integrated circuit chip disposed in the cavity; and a plurality of connectors disposed in the cavity to electrically connect at least the top surface of a top conductor of the plurality of connectors and the top surface of a bottom conductor of the plurality of connectors to a top surface of the integrated circuit chip, wherein the top surface of the integrated circuit chip is substantially co-planar with the top surface of the bottom conductor of the plurality of connectors such that the insulating layer is disposed on a side surface of the integrated circuit chip.
20. An electrical circuit device, comprising: an insulating layer; a conductor embedded in the insulating layer; a cavity extending from a surface of the insulating layer to the conductor; an integrated circuit chip disposed in the cavity; and a thermal slug disposed over a top surface of the integrated circuit chip for transferring a thermal energy away from the insulating layer.
Description
BRIEF DESCRIPTION OF THE DRAWINGS
(1) The foregoing and other exemplary purposes, aspects and advantages will be better understood from the following detailed description of an exemplary embodiment of the invention with reference to the drawings, in which:
(2)
(3)
(4)
(5)
(6)
DETAILED DESCRIPTION OF EXEMPLARY EMBODIMENTS OF THE INVENTION
(7) Referring now to the drawings, and more particularly to
(8) As explained above, there are many topologies conventionally available for implementing transmission lines in circuit boards (e.g., printed circuit boards (PCBs)). Internal embedded conductors, which may include an embedded conductor sandwiched between solid planes of a reference ground plane, offer many advantages over surface conductors. Embedded conductors support less dispersive transverse electric and magnetic modes which may be advantageous for wide band operation. An embedded conductor may also be self-shielding and, since they may undergo fewer processing steps than surface wiring they may be easier and less costly to fabricate.
(9) Connecting an integrated circuit chip to embedded conductors conventionally requires the use of vias to connect from the surface of a printed circuit board where components are traditionally attached. However, if the overlying layers are removed from the printed circuit board in accordance with an exemplary embodiment of the present invention (e.g. by milling) these embedded conductors may permit a more direct attachment of these embedded conductors to high speed nets on a chip. A chip may be connected to an embedded conductor using a wire bond, a ribbon bond, or the like, or may be flip chip connected using solder balls, or the like.
(10) As illustrated by
(11) In other words, the outer surface of the printed circuit board may be milled to form a cavity that extends down to a desired embedded conductor. Further, a side of such a cavity may have a terraced profile (step-shaped side surface) wherein each step of the terraced profile exposes a surface of an embedded conductor.
(12) In another exemplary embodiment of the present invention, after a cavity is formed in the printed circuit board, an exposed surface of the embedded conductor may be treated to facilitate bonding. For example, the surface may be plated with a metal (e.g., a noble metal such as gold, platinum, silver, and the like) to improve wire bonding and/or ribbon bonding.
(13) In an exemplary embodiment of the present invention, the cavity in the printed circuit board extends deep enough into the printed circuit board such that a top of an integrated circuit chip positioned in the recess would be substantially co-planar with an embedded conductor. The embedded conductor may then be provided the highest speed signal more directly from the integrated circuit chip.
(14) For example, in
(15) The step-shaped surface of the cavity may also reveal the surfaces of other embedded conductors, which are not substantially co-planar with a top of the chip. In general, as the distance from the top of the chip 204 to an embedded conductor increases, a longer connection will be required. A longer connection will generally offer poorer performance than a shorter connection and, therefore, the printed circuit board may be designed such that, as the distance between an embedded conductor and the top of the chip increases, the less critical a signal will be carried by that respective embedded conductor. For example, most low speed control lines do not require controlled impedance and, therefore, are insensitive to the longer distances that need to be bridged by a wire bond.
(16) Further, the less critical connections may use lower performance connections such as, for example, a wire bond and/or a ball bond as opposed to a ribbon bond. However, one of ordinary skill in the art understands that any type of connection may be used to establish electrical communication between a chip and an embedded conductor and still practice the invention.
(17) In the exemplary embodiment illustrated by
(18) Further, the next closest embedded conductors 216 to the top of the chip 204 are connected by ball bonds 218 to the chip 206.
(19)
(20) A printed circuit board may be constructed by laminating many different layers together using, for example, are epoxy resin. That lamination may be done under a high temperature and a pressure to cure the resin. The resin essentially flows between the layers in a pattern sensitive manner depending upon what copper features happen to be nearby. Thus, the surfaces between the layers of a printed circuit board may not necessarily be planar. Rather, the surfaces of the layers may incorporate a bit of waviness depending upon the copper patterns.
(21) Thus, when using a conventional milling machine and open-loop programming on the milling machine to mill down to a certain level into a printed circuit board, there is a likelihood that the milling might not reach a level that corresponds to the level of a desired embedded conductor. The thickness of a patterned copper layer of an embedded conductor is typically about 1 mil and the waviness of a reasonably thick layer of a printed circuit board is typically more than 1 mil. Therefore, a conventional milling machine may cut entirely through the embedded conductor, thereby, destroying the embedded conductor in some places, while simultaneously not even reaching the same embedded conductor in another place.
(22) In an exemplary embodiment of the present invention, a precision milling machine may sense an electrical contact between a cutting edge of the milling machine and a stripline. In this manner, the milling machine may incorporate a closed-loop feedback system that regulates the depth of the milling into the printed circuit board.
(23) In another exemplary embodiment of the present invention, a closed-loop feedback might not electrically sense the patterned layer of the desired embedded conductor in order to control the depth of the milling process. Rather, a calibration structure that may closely track the local internal waviness may be provided which provides a desired feedback control signal. This may be accomplished either electrically, with optical recognition, or by analyzing the chips as they are received from the milling operation. When copper chips are detected, then the desired target layer has been reached.
(24) Before connecting the leads, but after milling, an embedded conductor may have a bare surface. In an exemplary embodiment of the present invention, the bare surfaces of the embedded conductor may be plated with a material, which facilitates bonding. A material for plating may include, for example, gold and the like, which may be electro-lessly plated onto a surface of an embedded conductor.
(25) Alternatively, if a thicker gold layer is required, then a sacrificial plating web may be patterned in the copper and subsequently milled away.
(26) Although not shown in the Figures, ground planes in a printed circuit board may be electrically connected to each other using a via in close proximity to the milled cavity in order to maintain tight coupling between the planes for embedded conductor integrity.
(27)
(28) The printed circuit board 300 also includes a thermal slug 314 mounted to a top surface 316 of the chip 304 and a heat sink 318 mounted to an outer surface 320 of the thermal slug 314 to conduct thermal energy away from the printed circuit board 300.
(29) In another exemplary embodiment in accordance with the present invention (not shown), the chip may be accessed from the backside for thermal management.
(30) As illustrated by
(31) The other vias 408 supporting the non-embedded conductor signals from the chip 402 are not buried vias, but are typical through vias that have pads 410 at the level of the embedded conductor 404.
(32) In accordance with an exemplary embodiment of the present invention, these pads 410 may be revealed in the course of milling a cavity into the printed circuit board. This exemplary method maintains the low cost of through via construction by avoiding the use of buried vias.
(33)
(34) While the invention has been described in terms of several exemplary embodiments, those skilled in the art will recognize that the invention can be practiced with modification.
(35) Further, it is noted that, Applicant's intent is to encompass equivalents of all claim elements, even if amended later during prosecution.