METHOD OF DETECTING A CONDITION

Abstract

A method is for detecting a condition associated with a final phase of a plasma dicing process. The method includes providing a non-metallic substrate having a plurality of dicing lanes defined thereon, plasma etching through the substrate along the dicing lanes, wherein during the plasma etching infrared emission emanating from at least a portion of the dicing lanes is monitored so that an increase in infrared emission from the dicing lanes is observed as the final phase of the plasma dicing operation is entered, and detecting the condition associated with the final phase of the plasma dicing from the monitored infrared emission.

Claims

1. A method of detecting a condition associated with a final phase of a plasma dicing process comprising the steps of: providing a non-metallic substrate having a plurality of dicing lanes defined thereon; plasma etching through the substrate along the dicing lanes, wherein during the plasma etching infrared emission emanating from at least a portion of the dicing lanes is monitored so that an increase in infrared emission from the dicing lanes is observed as the final phase of the plasma dicing operation is entered; and detecting the condition associated with the final phase of the plasma dicing from the monitored infrared emission.

2. A method according to claim 1 in which at least one process variable is altered in response to the detection of the condition.

3. A method according to claim 2 in which the process variable is altered to adjust the plasma etching.

4. A method according to claim 3 in which the plasma etching is adjusted to reduce the rate of etching of the substrate.

5. A method according to claim 2 in which the process variable is altered to control a temperature associated with the plasma dicing process.

6. A method according to claim 2 in which the plasma etching is stopped in response to the detection of the condition.

7. A method according to claim 1 in which the condition is the approach of the end point.

8. A method according to claim 1 in which the condition is the end point.

9. A method according to claim 1 in which the end point is predicted in advance based on the observation of an increase in infrared emission from the dicing lanes.

10. A method according to claim 9 in which the end point is predicted by comparison to the increase of infrared emission from the dicing lanes with a numerical model.

11. A method according to claim 8 in which the end point is directly detected from the monitored infrared emission.

12. A method according to claim 11 in which the increase in infrared emission from the dicing lanes observed as the final phase is entered is followed by a decrease in infrared emission which is directly indicative of the end point.

13. A method according to claim 1 in which the substrate is attached to a frame with a tape.

14. A method according to claim 13 when dependent on claim 5 in which the process variable is altered to control the temperature of the tape.

15. A method according to claim 1 in which the substrate is a semiconductor substrate.

16. A method according to claim 15 in which the substrate is silicon, GaAs, GaN, InP or SiC.

17. A method according to claim 1 in which the plasma etching is performed using a cyclic etch and deposition process.

18. A plasma dicing apparatus comprising: a chamber; a substrate support for supporting a non-metallic substrate of the kind having dicing lanes; a plasma generator for generating plasma in the chamber suitable to plasma etch through the substrate along the dicing lanes; an infrared detector for monitoring infrared emission emanating from at least a portion of the dicing lane; and a condition detector configured to detect a condition associated with a final phase of the plasma dicing process from the monitored infrared emission.

Description

BRIEF DESCRIPTION OF THE DRAWINGS

[0044] Embodiments of methods and apparatus in accordance with the invention will now be described with reference to the accompanying drawings, in which:

[0045] FIG. 1 shows an apparatus of the invention;

[0046] FIG. 2 is a plan view of a substrate wafer with dicing lanes;

[0047] FIG. 3 show the detection of the remaining of material in a dicing lane and includes a cross sectional view of a portion of a substrate;

[0048] FIG. 4 shows the temperature distribution in the vicinity of a dicing lane obtained from a FEM model as the etch front approaches singulation with (a) 10 microns of silicon remaining (b) 2 microns of silicon remaining and (c) 0.2 microns of silicon remaining;

[0049] FIG. 5 shows the temperature at the rear of a silicon wafer below a dicing lane as the etch front approaches obtained from a FEM model;

[0050] FIG. 6 shows temperature as a function of time at the rear of a silicon wafer below a dicing lane during a cyclic etch and deposition process obtained from a FEM model;

[0051] FIG. 7 show pyrometer signal during the etch step of a cyclic etch and deposition process; and

[0052] FIG. 8 shows pyrometer (solid) and optical omission (dashed) signals obtained during a plasma dicing process.

DETAILED DESCRIPTION OF EMBODIMENTS

[0053] FIG. 1 shows a plasma dicing apparatus of the invention, depicted generally at 10. The apparatus 10 comprises a chamber 12 having a wafer loading slot 14. The interior of the chamber 12 houses a platen 16 on which a work piece such a wafer 18 may be loaded. The platen 16 as shown in FIG. 1 is in a raised position which is adopted during plasma dicing of the substrate. The platen can be moved between this raised position and a lower position. The lower position of the platen is adopted for receiving the substrate through the wafer loading slot. The chamber 12 is surrounded by an inductive coil 20. The inductive coil 20 is connected to a RF power generator (not shown) through an impedance matching network (not shown) as is well known in the art. Suitable etching gas or gases are supplied to the chamber 12 through a gas inlet system (not shown) and RF power is applied to the coil 20 to produce a plasma 22 in the chamber 12. Gases are removed from the chamber using a suitable vacuum exhaust system.

[0054] The apparatus 10 further comprises an infrared detector 24 which is mounted so as to monitor infrared emission during the plasma dicing process from the substrate 18. Conveniently, the infrared detector 24 can be mounted on or above the top of the chamber 12. However, in principle, the infrared detector can be mounted elsewhere provided that it is in a position suitable to monitor infrared emission from the substrate 18. In the embodiment shown in FIG. 1 the infrared detector is mounted at one end of a passage way 26 formed in the top section of the chamber 12. Other ways of mounting the infrared detector might be contemplated, such as directly mounting the infrared detector 24 on the top surface of the chamber 12. The infrared detector 24 can be in any suitable form, although it has been found that there are advantages associated with using a pyrometer or an infrared camera such as a CCD array. The apparatus 10 further comprise a controller 28. The controller receives the output of the infrared detector 24 and processes the output in order to detect one or more conditions associated with the final phase of the plasma dicing process. The way in which the controller 28 operates to recognise the condition or conditions is described in more detail below. On recognition of a condition, the controller may act to adjust or otherwise control one or more operations of the apparatus. In particular, the plasma dicing process may be adjusted or halted once a condition associated with the final stage of the plasma dicing process has been detected. The controller 28 may comprise or be connected to a suitable graphical user interface to display information associated with the plasma dicing process. This information can include an indication that the condition has been detected.

[0055] FIG. 2 (a) is a plan view of a wafer substrate 120. The wafer substrate 120 has a mask formed on its upper surface from a suitable material such aluminium. The mask defines a plurality of dicing lanes 122. Each dicing lane 122 corresponds to a linear gap in the mask which exposes the underlying material of the substrate to the plasma 22. Typically, a mask is deposited to define a plurality of dicing lanes substantially as shown in FIG. 2, namely a plurality of co-linear dicing lanes extending in one direction and a plurality of co-linear dicing lanes extending in an orthogonal direction. In this way, a cross hatch pattern of dicing lanes is obtained. FIGS. 2(b) and 2(c) show portions of the surface of the substrate wafer 120 in more detail. More particularly, FIG. 2(b) shows a region in which two co-linear dicing lanes intersect with two perpendicular dicing lanes. FIG. 2(c) shows the intersection of a single dicing lane with a perpendicular dicing lane. The infrared detector maybe configured and positioned to monitor the whole of the upper surface of the substrate wafer 120 or monitor just a portion of a substrate wafer 120. For example, the portion shown in FIG. 2(b) or the portion shown in FIG. 2(c) might be specifically monitored. Suitable optics might be employed so that the desired area can be monitored with the infrared detector.

[0056] FIG. 3 shows a cross section of a portion of a wafer substrate 130 during the course of a plasma dicing process. The substrate wafer 130 comprises the bulk substrate material 130a with the mask 130b formed thereon to define a dicing lane 130c. The wafer substrate 130 is mounted on a tape 132 which attaches the wafer substrate 130 to a frame (not shown). In some embodiments the 130 bulk substrate material 130a has a thin layer (up to 5 microns) of a backside metal on its rear surface. The backside metal could be mounted on the tape 132. Also shown in FIG. 3 is an infrared detector 134. The infrared detector 134 is positioned to monitor infrared emission from the dicing lane 130c. The wafer substrate 130 is positioned in a suitable apparatus such as the apparatus shown in FIG. 1. The infrared detector 134 forms part of this apparatus. FIG. 3 shows in semi-schematic form the appearance of the dicing lane 130c after a substantial portion of the plasma dicing process has been completed. The dicing lane 130c has been substantially etched to form a trench structure. The floor of the trench structure 136 corresponds to the etch front at this point in the process. In the example shown in FIG. 3, a relatively small remaining thickness (t) of material remains to be etched in the dicing lane 130c.

[0057] A FEM (Finite Element Method) model has been built to examine the plasma dicing process in more detail when there is a relatively small remaining thickness (t) of substrate remaining to be etched in the dicing lanes. FIG. 4 shows a pictorial sequence of the temperature distribution in the vicinity of a dicing lane. More particularly, the results shown in FIG. 4 correspond generally to the portion of a substrate shown in FIG. 2(c) where two mutually perpendicular dicing lanes intercept. A silicon substrate has been assumed for the purposes for the SEM model. FIG. 4(a) shows the temperature distribution when a 10 micron thickness of silicon remains in the dicing lanes. It can be seen that a substantial amount of heat spreads into the adjacent dies. FIG. 2(b) shows the temperature distribution when a two micron thickness of silicon remains in the dicing lanes. It can be seen that heat transfer into the surrounding dies is far less efficient. FIG. 4(c) shows the temperature distribution when there is only a 200 nm layer of silicon remaining in the dicing lanes. It can be seen that heat transfer into the adjacent dies is minimal and instead the heat flux is concentrated in the dicing lanes. The intersection between mutually perpendicular dicing lanes gives rise to a particularly high heat flux. The FEM is based on a consistent heat load at the different etch depths. The rate of silicon etch and therefore the total heat load generated at the etch front is the same in all instances. Without wishing to be bound by any particular theory or conjecture, it is believed that the results shown in FIG. 4 can be readily explained. Silicon is a relatively good thermal conductor and in FIG. 4(a) the heat generated during the plasma dicing process is spread quite efficiently into the adjacent dies. As the etch proceeds, the remaining thickness of silicon in the dicing lanes reduces. It is believed that this limits the effective conductivity of heat into the surrounding dies. In other words, the lateral heat conductivity of the remaining silicon diminishes as the remaining thickness of silicon reduces. FIG. 5 shows the temperature at the rear of the silicon wafer as the etch front approaches the rear surface of the silicon wafer. The point of singulation is achieved when the etch front reaches the rear surface of the wafer. The same FEM model used to generate the results shown in FIG. 4 is used to generate the temperature curve 150 shown in FIG. 5. It is apparent that as the thickness of remaining silicon in the dicing lane approaches zero, the local temperature directly under the dicing lane increases substantially. The rate of temperature rise increases at around 1.5 microns of remaining silicon and increases substantially with around 500-600 nm of silicon remaining.

[0058] FIGS. 4 and 5 show time averaged temperatures during the silicon etch. With a switched etch process, in which cyclic etch and deposition steps are used, the situation is even more complex as the heat load and etch front temperature follows the alternate etch and deposition cycle. This is show in FIG. 6 which shows the time dependent temperature 160 at the rear of the silicon wafer directly below the etch front during a cyclic (Bosch) silicon etch process. The results are based on the FEM model described above with a periodic time-dependent heat load of arbitrary amplitude.

[0059] The present inventors have realised that the final phase of a plasma dicing process, up to and including the singulation end point, can be sensitively detected by monitoring infrared emission from the dicing lanes. Surprisingly, sensitive detection can be achieved against the background thermal emission occurring within a plasma dicing chamber from other energetic heat sources such as the plasma itself. Even more surprisingly, a relatively simple and inexpensive device such as a pyrometer can be used for these purposes. Alternatively, an infrared camera can provide excellent results. The infrared detector monitors in real time the infrared emission from the dicing lanes. The average wafer temperature or the temperature in a specific region of the wafer or in a specific dicing lane can be monitored. Alternatively, the apparatus can monitor for a pre-set maximum temperature to be recorded anywhere in the field of view. The present inventors have realised that the significant rise in temperature in the dicing lanes as the etch front approaches the singulation point its indicative of the final phase of the plasma dicing process being entered. Additionally, this phenomenon enables the final phase to be detected with a good sensitivity by monitoring infrared emission from the dicing lanes. The signal from the infrared detector is fed back to the controller. Once a certain condition has been detected, the controller can switch the process to another mode. This trigger condition may be a certain thickness of material remaining in the lane to be etched. This is possible because the local temperature detected in the dicing lanes is a function of the material remaining in the lane and not the depth etched. Therefore, the controller can recognise how much material remains in the dicing lane to be etched from the signal produced by the infrared detector. For example, the controller can compare the output signal with a numerical model. The mode that the process is switched to may utilise less severe etch conditions to reduce the heat load. For example, a lower etch rate might be used. Alternatively, the etch may completely halted so that a small amount of material remains at the bottom of the dicing lanes.

[0060] If the etch is allowed to proceed to the singulation point where the material in the dicing lanes is completely etched away, then the temperature in the dicing lanes drops abruptly. This is because once the singulation is complete is there is little or no exothermic chemical reaction occurring, so the temperature of the wafer reduces. This can be used as a way of detecting the end point from the infrared emission from the dicing lanes. The detection of the end point can be used to trigger the end of the process. This represents an alternative end point detection method to optical emission based end point detection. It is advantageous to use infrared emission to directly detect the end point for reasons such as cost, simplicity, and a desirability of using the same hardware for end pointing and other process conditions. Experiments have been performed using optical emission based end point detection and detection based on infrared emission from the dicing lane. FIG. 8 shows optical emission signals 182 and signals 180 obtained using a pyrometer. Good agreement is observed between the two sets of signals. In particular, both sets of signals indicate a singulation end point for two separate dicing processes at a time of approximately 250 seconds. The skilled reader will understand that after the end point is reached, many process run an ‘over etch’ step to clear a residual material from the etched features. However, the chemical energy realised in the over etch is a fraction of the realised in the main bulk etch. Accordingly, a discernible decrease in infrared emission is still to be expected once the end point is reached.

[0061] Moreover, the present invention can be used to predict the end point in advance of its actual occurrence. The end point prediction can be performed in addition to or instead of direct end point detection. This is an extremely advantageous facet of the present invention. The present invention enables the detection of certain conditions associated with the final phase of the plasma dicing process, such as the detection of a certain remaining thickness of material in the dicing lanes.

[0062] From this, the time to the end point can be derived using suitable means, such as a numerical model, look up tables, or artificial intelligence. The prediction of the end point can be refined as the etch proceeds. As noted above, process variables can be altered once a given condition has been detected, and any such alteration of process variables can be accounted for when predicting the end point.

[0063] Fault detection can also be accomplished. FIG. 7 shows pyrometer signal obtained during the etch steps of a switched (cyclic) etching deposition process. Pyrometer signal 170 (blue data) corresponds to instances of successful clamping of the wafer/tape/frame to a cooled electrostatic chuck. Pyrometer signal 170 corresponds to a partial declamping of the wafer/tape/frame from the electrostatic chuck. Pyrometer signal 174 corresponds to a full declamping of the wafer/tape/frame from the electrostatic chuck. With the instances of successful clamping the temperature rise during each individual etch in the cycle should actually drop with increasing temperature. The temperature increases with time as the etch progresses. When the wafer/tape/frame partially declamps, thermal contact is lost and a greater temperature rise occurs during an individual etch depth. In the case of full declamping, a substantial thermal run away occurs which is manifest in still larger temperature rises during individual etch steps. In this instance, there is serious risk of the tape completely melting. The present invention can be used to detect the occurrence of thermal run away. On detection of declamping and/or thermal run away the controller can abort the etching process and initiate appropriate recovery actions. Another fault can occur when there is a breakdown in the passivation layer on the sidewall of a dicing lane or when a stop layer at the feature base is breached. In these instances chemical heating will occur which can be detected by monitoring infrared emission. This can also be flagged by the controller as a processing fault.

[0064] Thermal monitoring of the substrate wafer is possible in a plasma chamber as a large proportion of the signal comes from the infrared radiation emitted by the substrate. This means that the material and the surface of the substrate are less important than might have been expected. For example, the data presented herein were obtained from wafers having an aluminium mask which covers approximately 75% of the surface area of the wafer. However, the cycles of the Bosch process etching are still clearly discernible using a pyrometer as an infrared detector. The surface material of the substrate and the viewing angle of the infrared detector do make a difference to the background layer of the signal due to reflections from the chamber walls. This can make it somewhat difficult to derive an absolute substrate temperature from the infrared emission. However, in many instances, such as fault, end point and uniformity detection, the absolute temperature is not required.

[0065] Numerous modifications to the methods and apparatus described above are possible. For example, as described above, the local temperature at the rear of the substrate underneath the dicing lanes increases as the etch front approaches the singulation point. This effect gets stronger as the lateral dimensions of the etch features increase. For very narrow dicing lanes, it is possible that the temperature spike may be below the sensitivity level of a given infrared detector. This may be overcome by including a test structure in the substrate which is within the field of view of the infrared detector. In this way, a more easily detectable local temperature change can be provided. The invention is equally applicable to substrates that have one or more backside metal (BSM) layers attached thereto and substrates that do not. Although the invention has been exemplified in relation to substrates carried on a tape and frame arrangement, this is not a limiting aspect of the invention. Instead, the invention can be applied to systems which do not use a tape and frame arrangement, such a systems in which the substrate is directly supported on a platen or other substrate support.