SPD-based memory monitoring and service life prediction method and system

Abstract

An SPD-based memory monitoring and service life prediction method and system. Said method includes: acquiring parameter information of each memory bank in a server, and setting a weight for the parameter information; reading configuration information of each memory bank, and calculating occupation ratio information of parameters of each memory bank according to the configuration information and the parameter information; calculating state information of each memory bank according to the weight and the occupation ratio information; determining an influence factor according to the number of CPUs in the server and the number and position of memory banks in each CPU; and calculating a final memory state value according to the influence factor and the state information, and according to the used time and the state information of each memory bank, calculating the remaining service life of each memory bank by means of piecewise fitting using a least square method.

Claims

1. An SPD-based memory monitoring and life prediction method, comprising: acquiring parameter information of each memory bank in a server, and setting a weight for the parameter information; reading configuration information of each memory bank in the server, and calculating proportion information of each memory bank parameter according to the configuration information and the parameter information; calculating state information of each memory bank according to the weight and the proportion information; determining an impact factor according to a quantity of CPU in the server as well as a quantity and a location of memory banks in each CPU; calculating a final memory state value according to the impact factor and the state information, and grading the state value; and calculating remaining life of each memory bank by a least square piecewise fitting method according to using time and the state information of each memory bank.

2. The SPD-based memory monitoring and life prediction method according to claim 1, wherein the method further comprises: setting pending execution time to perform regular execution monitoring and memory bank life prediction; and setting a cron expression to perform periodic execution monitoring and memory bank life prediction.

3. The SPD-based memory monitoring and life prediction method according to claim 1, wherein the parameter information of each memory bank in the server comprises an erasing-writing speed v.sub.i, access data delay time t.sub.i, a maximum frequency f.sub.i in operation, an average temperature te.sub.i and an average voltage vo.sub.i in operation; where i is a number of the memory bank.

4. The SPD-based memory monitoring and life prediction method according to claim 3, wherein a formula for calculating the proportion information of each memory bank parameter according to the configuration information and the parameter information is ${\mathrm{rv}}_i=\frac{v_i}{V_i},{\mathrm{rt}}_i=\frac{t_i}{T_i},{\mathrm{rf}}_i=\frac{f_i}{F_i},{\mathrm{rte}}_i=\frac{{\mathrm{te}}_i}{{\mathrm{TE}}_i},{\mathrm{rvo}}_i=\frac{{\mathrm{vo}}_i}{{\mathrm{VO}}_i}$ wherein rv.sub.i is proportion information of the erasing-writing speed; rt.sub.i is proportion information of access data delay time; rf.sub.i is proportion information of the maximum frequency in operation; rte.sub.i is proportion information of the average temperature in operation; rvo.sub.i is proportion information of the average voltage; V.sub.i is erasing-writing speed of the configuration information of the memory bank; T.sub.i is access data delay time of the configuration information of the memory bank; F.sub.i is maximum frequency in operation of the configuration information of the memory bank; TE.sub.i is average temperature in operation of the configuration information of the memory bank; and VO.sub.i is average voltage in operation of the configuration information of the memory bank.

5. The SPD-based memory monitoring and life prediction method according to claim 4, wherein a formula for calculating the state information of each memory bank according to the weight and the proportion information is: the state information s.sub.i of each memory bank=ω.sub.v*rv.sub.i+ω.sub.t*rt.sub.i+ω.sub.f*rf.sub.i+ω.sub.te*rte.sub.i+ω.sub.vo*rvo.sub.i; where ω.sub.v is a weight of the erasing-writing speed; ω.sub.t is a weight of the access data delay time; ω.sub.f is a weight of maximum frequency in operation; ω.sub.te is a weight of the average temperature in operation; and ω.sub.vo is a weight of the average voltage in operation.

6. The SPD-based memory monitoring and life prediction method according to claim 5, wherein a formula for calculating the final memory state value according to the impact factor and the state information is: the memory state $S=\underset{i=1}{\overset{n}{.Math.}}\left({\omega }_i*s_i+{\epsilon }_i\right)+c;$ wherein ω.sub.i represents an impact factor; ε.sub.i represents a random error with a mean value of 0 and a variance of 0.1; and c is a constant term.

7. The SPD-based memory monitoring and life prediction method according to claim 6, wherein the method of calculating the remaining life of each memory bank by a least square piecewise fitting method according to the using time and the state information of each memory bank comprises: performing data interpolation and piecewise least square fitting for discrete data corresponding to each memory bank to obtain a fitting function f(s.sub.i, t.sub.d) with a smallest error sum of squares corresponding to each memory bank; and making s.sub.i tend to zero to obtain the predicted total life of the memory bank, and obtain the remaining life TL.sub.i of the memory bank.

8. The SPD-based memory monitoring and life prediction method according to claim 7, wherein after the step of setting a cron expression to perform periodic execution monitoring and memory bank life prediction, the method further comprises: outputting results of each monitoring.

9. The SPD-based memory monitoring and life prediction method according to claim 8, wherein the results of each monitoring comprise at least one of final memory monitoring information, health state results and the remaining life.

10. The SPD-based memory monitoring and life prediction method according to claim 9, wherein the method further comprises: saving the results of each monitoring as a log.

11. The SPD-based memory monitoring and life prediction method according to claim 10, wherein the log is saved in local or in a log server.

12. The SPD-based memory monitoring and life prediction method according to claim 6, wherein a health state f(S) is determined by grading the memory state S according to a pre-set piecewise function: $f\left(S\right)=\{\begin{array}{cc}\mathrm{normal}& \left(S\ge 0.5\right)\\ \mathrm{warning}& \left(S\ge 0.1,S<0.5\right)\\ \mathrm{critical}& \left(S<0.1\right)\end{array}.$

13. The SPD-based memory monitoring and life prediction method according to claim 1, wherein the server is provided with a plurality of CPUs, each CPU manages and controls a plurality of memory banks and is plugged in slots at different locations.

14. An SPD-based memory monitoring and life prediction system, comprising a processor; and a memory, storing a computer program that is executed by the processor, and upon execution by the processor, is configured to cause the processor to implement operations comprising: acquiring parameter information of each memory bank in a server, and setting a weight for the parameter information; reading configuration information of each memory bank in the server, and calculating proportion information of each memory bank parameter according to the configuration information and the parameter information; calculating state information of each memory bank according to the weight and the proportion information; determining an impact factor according to a quantity of CPU in the server as well as a quantity and a location of memory banks in each CPU; calculating a final memory state value according to the impact factor and the state information, and grading the state value; and calculating remaining life of each memory bank by a least square piecewise fitting method according to the using time and the state information of each memory bank.

15. The SPD-based memory monitoring and life prediction system according to claim 14, wherein the operations further comprise: setting a pending execution time to perform regular execution monitoring and memory bank life prediction; or setting a cron expression to perform periodic execution monitoring and memory bank life prediction.

16. The SPD-based memory monitoring and life prediction system according to claim 14, wherein the parameter information of each memory bank in the server comprises an erasing-writing speed v.sub.i, access data delay time t.sub.i, a maximum frequency f.sub.i in operation, an average temperature te.sub.i and an average voltage vo.sub.i in operation; where i is a number of the memory bank.

17. The SPD-based memory monitoring and life prediction system according to claim 16, wherein a formula for calculating the proportion information of each memory bank parameter according to the configuration information and the parameter information is ${\mathrm{rv}}_i=\frac{v_i}{V_i},{\mathrm{rt}}_i=\frac{t_i}{T_i},{\mathrm{rf}}_i=\frac{f_i}{F_i},{\mathrm{rte}}_i=\frac{{\mathrm{te}}_i}{{\mathrm{TE}}_i},{\mathrm{rvo}}_i=\frac{{\mathrm{vo}}_i}{{\mathrm{VO}}_i}$ wherein rv.sub.i is proportion information of the erasing-writing speed; rt.sub.i is proportion information of access data delay time; rf.sub.i is proportion information of the maximum frequency in operation; rte.sub.i is proportion information of the average temperature in operation; rvo.sub.i is proportion information of the average voltage; V.sub.i is erasing-writing speed of the configuration information of the memory bank; T.sub.i is access data delay time of the configuration information of the memory bank; F.sub.i is maximum frequency in operation of the configuration information of the memory bank; TE.sub.i is average temperature in operation of the configuration information of the memory bank; and VO.sub.i is average voltage in operation of the configuration information of the memory bank.

18. The SPD-based memory monitoring and life prediction system according to claim 17, wherein a formula for calculating the state information of each memory bank according to the weight and the proportion information is: the state information s.sub.i of each memory bank=ω.sub.v*rv.sub.i+ω.sub.t*rt.sub.i+ω.sub.f*rf.sub.i+ω.sub.te*rte.sub.i+ω.sub.vo*rvo.sub.i; where ω.sub.v is a weight of the erasing-writing speed; ω.sub.t is a weight of the access data delay time; ω.sub.f is a weight of maximum frequency in operation; ω.sub.te is a weight of the average temperature in operation; and ω.sub.vo is a weight of the average voltage in operation.

19. The SPD-based memory monitoring and life prediction system according to claim 18, wherein the operations further comprise: outputting results of each monitoring; the results of each monitoring comprise at least one of final memory monitoring information, health state results and the remaining life.

20. The SPD-based memory monitoring and life prediction system according to claim 14, wherein the server is provided with a plurality of CPUs, each CPU manages and controls a plurality of memory banks and is plugged in slots at different locations.

Description

BRIEF DESCRIPTION OF THE DRAWINGS

(1) In order to more clearly explain the embodiments of the present disclosure or the technical solutions in the prior art, a brief description will be given below with reference to the accompanying drawings used in the description of the embodiments or the prior art. Obviously, the drawings in the description below are merely embodiments of the present disclosure. For those of ordinary skill in the art, other drawings may be obtained according to the provided drawings without any creative effort.

(2) FIG. 1 shows a flow chart of an SPD-based memory monitoring and life prediction method according to embodiment 1 of the present disclosure; and

(3) FIG. 2 shows a schematic diagram of an SPD-based memory monitoring and life prediction system according to embodiment 1 of the present disclosure.

DETAILED DESCRIPTION

(4) In the following, the technical solution of the embodiment of the present application will be clearly and completely described in combination with the drawings of the embodiment of the present application. Obviously, the embodiment described is only a part of the embodiments of the present application, not the whole embodiments. Based on the embodiments in the present application, all other embodiments obtained by a person of ordinary skill in the art without making creative labor belong to the scope of protection of the present application.

(5) In the description of the present application, it is necessary to understand that the terms ‘vertical’, ‘horizontal’, ‘up’, ‘down’, ‘front’, ‘back’, ‘left’, ‘right’, ‘vertical’, ‘horizontal’, ‘top’, ‘bottom’, ‘inside’, ‘outside’ and so on indicate the orientation or positional relationship based on the orientation or positional relationship shown in the drawing, only to facilitate the description of the present application, rather than indicating or implying that the device or component may have a specific orientation, be constructed and operated in the specific orientation, which may not be understood as a limitation to the invention.

Embodiment 1

(6) The present disclosure provides an SPD-based memory monitoring and life prediction method and system. Serial Presence Detect (SPD) is a set of configuration information about a memory module. FIG. 1 shows a flow chart of an SPD-based memory monitoring and life prediction method according to embodiment 1 of the present disclosure.

(7) In step S101, the process starts.

(8) In step S102, parameter information of each memory bank in the server is acquired, and a weight is set for the parameter information. The parameter information of each memory bank in the server includes: an erasing-writing speed v.sub.i, access data delay time t.sub.i, a maximum frequency f.sub.i in operation, an average temperature te.sub.i and an average voltage vo.sub.i in operation; where i is a number of the memory bank. An empirical value weight is set for each parameter information of the memory based on the usage experience of the industry. In embodiment 1 of the present disclosure, set ω.sub.v=0.3, ω.sub.t=0.3, ω.sub.f=0.2, ω.sub.te=0.1, ω.sub.vo=0.1, where ω.sub.f is a weight of the erasing-writing speed; ω.sub.t is a weight of the access data delay time; ω.sub.f is a weight of the maximum frequency in operation; ω.sub.te is a weight of the average temperature in operation; and ω.sub.vo is the weight of the average voltage in operation. The scope of protection in the technical solution is not limited to embodiment 1.

(9) In step S103, the configuration information corresponding to each memory bank is read based on the memory SPD, where V.sub.i is an erasing-writing speed of the configuration information of the memory bank; T.sub.i is access data delay time of the configuration information of the memory bank; F.sub.i is a maximum frequency in operation of the configuration information of the memory bank; TE.sub.i is an average temperature in operation of the configuration information of the memory bank; VO.sub.1 is an average voltage in operation of the configuration information of the memory bank.

(10) A formula for calculating the proportion information of each memory bank parameter according to the configuration information and the parameter information is

(11) ${\mathrm{rv}}_i=\frac{v_i}{V_i},{\mathrm{rt}}_i=\frac{t_i}{T_i},{\mathrm{rf}}_i=\frac{f_i}{F_i},{\mathrm{rte}}_i=\frac{{\mathrm{te}}_i}{{\mathrm{TE}}_i},{\mathrm{rvo}}_i=\frac{{\mathrm{vo}}_i}{{\mathrm{VO}}_i},$

(12) wherein rv.sub.i is proportion information of the erasing-writing speed; rt.sub.i is proportion information of access data delay time; rf.sub.i is proportion information of the maximum frequency in operation; rte.sub.i is proportion information of average temperature in operation; rvo.sub.i is proportion information of the average voltage.

(13) The state information of each memory bank is calculated according to the weight and the proportion information; and the state information s.sub.i of each memory bank
s.sub.i=ω.sub.v*rv.sub.i+ω.sub.t*rt.sub.i+ω.sub.f*rf.sub.i+ω.sub.te*rte.sub.i+ω.sub.vo*rvo.sub.i.

(14) In step S104, an impact factor is determined according to a quantity of CPU in the server as well as a quantity and a location of memory banks in each CPU. A server is provided with a plurality of CPUs, and each CPU may manage and control a plurality of memory banks and be plugged in slots at different locations. Here, the impact factor ω.sub.i of each memory bank is determined according to the total number of CPU in the current server, the CPU controlled by the memory bank, and the slot location of the memory.

(15) A final memory state value is calculated according to the impact factor and state information, wherein the memory state of

(16) $S=\underset{i=1}{\overset{n}{.Math.}}\left({\omega }_i*s_i+{\epsilon }_i\right)+c;$
wherein ε.sub.i represents a random error with a mean value of 0 and a variance of 0.1; and c is a constant term. In embodiment 1 of the present disclosure, c is set to 0.05.

(17) In step S105, a memory state S is graded according to a pre-set piecewise function to show the corresponding health state:

(18) $f\left(S\right)=\{\begin{array}{cc}\mathrm{normal}& \left(S\ge 0.5\right)\\ \mathrm{warning}& \left(S\ge 0.1,S<0.5\right)\\ \mathrm{critical}& \left(S<0.1\right)\end{array}$

(19) In step S106, remaining life T.sub.i is calculated according to the using time t.sub.d of the memory bank and the memory state s.sub.i. Different memory banks have different discrete data. By observing the distribution of the discrete data corresponding to each memory bank, Henmiter interpolation is firstly performed on the discrete data to obtain more samples of data for subsequent use. Considering the decay rate of memory usage, piecewise least squares fitting is performed. By means of the fitting method, it may obtain the fitting function f(s.sub.i, t.sub.d) with a smallest error sum of squares, making s.sub.i tend to 0, so that the predicted total life of the memory bank may be obtained, and the remaining life TL.sub.i of the memory bank may be obtained.

(20) In step S107, whether to execute monitoring and life prediction immediately is set. If regular execution is required, the pending execution time is input; and if periodic execution is required, the cron expression is input.

(21) In step S108, it outputs the final memory monitoring information, the health state results and the remaining life prediction TL.sub.i.

(22) In step S109, the result of each monitoring is saved as a log, and saved locally or forwarded to a special log server for convenient statistics and viewing.

(23) In step S110, the whole process ends.

(24) The present disclosure also proposes an SPD-based memory monitoring and life prediction system, which includes an acquisition and setting module, a read and calculation module, a determination and calculation module as well as a fitting and calculation module.

(25) The acquisition and setting module is configured for acquiring parameter information of each memory bank in a server, and setting a weight for the parameter information. Parameter information of each memory bank in the server includes: an erasing-writing speed v.sub.i, access data delay time t.sub.i, a maximum frequency f in operation, an average temperature te.sub.i in operation and an average voltage vo.sub.i, where i is the number of the memory bank. An empirical value weight is set for each parameter information of the memory based on the usage experience of the industry.

(26) The read and calculation module is configured for reading configuration information of each memory bank in the server, and calculating proportion information of each memory bank parameter according to the configuration information and the parameter information; calculating state information of each memory bank according to the weight and the proportion information; where V.sub.i is an erasing-writing speed of the configuration information of the memory bank; T.sub.i is access data delay time of the configuration information of the memory bank; F.sub.i is a maximum frequency in operation of the configuration information of the memory bank; TE.sub.i is an average temperature in operation of the configuration information of the memory bank; VO.sub.1 is an average voltage in operation of the configuration information of the memory bank.

(27) A formula for calculating the proportion information of each memory bank parameter according to the configuration information and the parameter information is

(28) ${\mathrm{rv}}_i=\frac{v_i}{V_i},{\mathrm{rt}}_i=\frac{t_i}{T_i},{\mathrm{rf}}_i=\frac{f_i}{F_i},{\mathrm{rte}}_i=\frac{{\mathrm{te}}_i}{{\mathrm{TE}}_i},{\mathrm{rvo}}_i=\frac{{\mathrm{vo}}_i}{{\mathrm{VO}}_i},$

(29) wherein rv.sub.i is the proportion information of the erasing-writing speed; rt.sub.i is the proportion information of access data delay time; rf.sub.i is the proportion information of the maximum frequency in operation; rte.sub.i is the proportion information of the average temperature in operation; and rvo.sub.i is the proportion information of the average voltage.

(30) The state information of each memory bank is calculated according to the weight and the proportion information. The state information s.sub.i of each memory bank=ω.sub.v*rv.sub.i+ω.sub.t*rt.sub.i+ω.sub.f*rf.sub.i+ω.sub.te*rte.sub.i+ω.sub.vo*rvo.sub.i.

(31) The determination and calculation module is configured for determining an impact factor according to a quantity of CPU in the server as well as a quantity and a location of memory banks in each CPU; calculating a final memory state value according to the impact factor and the state information, and grading the state value; and determining an impact factor according to the number of CPU in the server as well as the number and the location of memory banks in each CPU. A server is provided with a plurality of CPUs, and each CPU may manage and control a plurality of memory banks and be plugged in slots at different locations. Here, the impact factor ω.sub.i of each memory bank is determined according to the total number of CPU in the current server, the CPU controlled by the memory bank, and the slot location of the memory.

(32) A final memory state value is calculated according to the impact factor and the state information, and the memory state

(33) $S=\underset{i=1}{\overset{n}{.Math.}}\left({\omega }_i*s_i+{\epsilon }_i\right)+c;$
wherein ε.sub.i represents a random error with a mean value of 0 and a variance of 0.1; and c is a constant term.

(34) In embodiment 1 of the present disclosure, c is set to 0.05.

(35) The memory state S is graded according to a pre-set piecewise function to show the corresponding health state:

(36) $f\left(S\right)=\{\begin{array}{cc}\mathrm{normal}& \left(S\ge 0.5\right)\\ \mathrm{warning}& \left(S\ge 0.1,S<0.5\right)\\ \mathrm{critical}& \left(S<0.1\right)\end{array}$

(37) The fitting and calculation module is configured for calculating remaining life of each memory bank by a least squares piecewise fitting method according to the using time and the state information of each memory bank. The remaining life T.sub.i is calculated according to the using time t.sub.d and the memory state s.sub.i of the memory bank. Different memory banks have different discrete data. By observing the distribution of the discrete data corresponding to each memory bank, Henmiter interpolation is firstly performed on the discrete data to obtain more samples of data for subsequent use. Considering the decay rate of memory usage, piecewise least squares fitting is performed. By means of the fitting method, it may obtain the fitting function f (s.sub.i, t.sub.d) with a smallest error sum of squares, making s.sub.i tend to 0, so that the predicted total life of the memory bank may be obtained, and then the remaining life TL.sub.i of the memory bank.

(38) The system further includes an execution module configured for setting a pending execution time to perform regular execution monitoring and memory bank life prediction; or setting a cron expression to perform periodic execution monitoring and memory bank life prediction.

(39) The above content is only an example and description of the structure of the present disclosure. A person skilled in the art make various modifications or supplements to the specific embodiments described or replace them in a similar way. Only they do not deviate from the structure of the present disclosure or exceed the scope defined in this claim, they should belong to the protection scope of the present disclosure.