Bonding pad structure of a semiconductor device
10461050 · 2019-10-29
Assignee
Inventors
- Hidekazu Tanisawa (Tsukuba, JP)
- Shinji Sato (Tsukuba, JP)
- Fumiki Kato (Tsukuba, JP)
- Hiroshi Sato (Tsukuba, JP)
- Kenichi Koui (Tsukuba, JP)
- Hiroki Takahashi (Tsukuba, JP)
- Yoshinori Murakami (Yokohama, JP)
Cpc classification
H01L2224/48472
ELECTRICITY
H01L2924/00012
ELECTRICITY
H01L2224/04042
ELECTRICITY
H01L24/10
ELECTRICITY
H01L2224/32225
ELECTRICITY
H01L2224/05617
ELECTRICITY
H01L2224/2919
ELECTRICITY
H01L2224/32225
ELECTRICITY
H01L2224/2919
ELECTRICITY
H01L2224/04026
ELECTRICITY
H01L2224/48229
ELECTRICITY
H01L2224/48477
ELECTRICITY
H01L2924/00014
ELECTRICITY
H01L2224/05617
ELECTRICITY
H01L24/42
ELECTRICITY
H01L2924/00014
ELECTRICITY
H01L2924/00012
ELECTRICITY
H01L2224/85417
ELECTRICITY
H01L2224/05117
ELECTRICITY
H01L2224/85417
ELECTRICITY
H01L2224/4847
ELECTRICITY
H01L2224/05117
ELECTRICITY
H01L24/73
ELECTRICITY
International classification
H01L29/40
ELECTRICITY
H01L23/52
ELECTRICITY
Abstract
An object of the present invention is to stabilize and strengthen the strength of a bonding part between a metal electrode on a semiconductor chip and metal wiring connected thereto using a simple structure. Provided is a semiconductor device including a metal layer 130 on a surface of a metal electrode 120 formed on a semiconductor chip 110, the metal layer 130 consisting of a metal or an alloy different from a constituent metal of the metal electrode 120, metal wiring 140 is connected to the metal layer 130 via a bonding part 150, wherein the constituent metal of the metal layer 130 is a metal or an alloy different from the constituent metal of the metal electrode 120, and the bonding part 150 has an alloy region harder than the metal wiring 140.
Claims
1. A semiconductor device comprising: a semiconductor chip; a metal electrode formed on a surface of the semiconductor chip; and metal wiring connected to the metal electrode via a bonding part, wherein an outer peripheral of the metal wiring is covered with a metal layer consisting of a metal or an alloy different from a constituent metal of the metal electrode, the bonding part has an alloy region harder than the metal wiring, and the metal layer is formed on an upper surface and a lower surface of at least the metal wiring, and a part of the lower surface contacts the bonding part.
2. The semiconductor device according to claim 1, wherein the metal layer is an alloy essentially consisting of Zn and Al, and the metal wiring is one of Ag, Al, Au, Cu, and an alloy essentially consisting of one of Ag, Al, Au, and Cu.
3. The semiconductor device according to claim 1, wherein the metal layer is an alloy essentially consisting of Au, and the metal wiring is one of Al, Cu, and an alloy essentially consisting of Al and Cu.
4. The semiconductor device according to claim 1, wherein the metal layer is one of Sn and an alloy essentially consisting of Sn, and the metal wiring is one of Ag, Au, Cu, and an alloy essentially consisting of one of Ag, Au, and Cu.
5. The semiconductor device according to claim 1, wherein a flat region is formed on the metal wiring that is covered by the metal layer, the flat region being positioned at a side opposite from the bonding part, a longitudinal length of the flat region, which is determined in a wiring direction along which the metal wiring extends, is the same as a length of the bonding part, which is determined in the wiring direction.
6. The semiconductor device according to claim 5, wherein the flat region is shaped while the bonding part is formed by ultrasonic being applied to the metal wiring.
7. A semiconductor device comprising: a semiconductor chip; a metal electrode formed on a surface of the semiconductor chip, the metal electrode being formed of a constituent metal; a metal layer formed on a surface of the metal electrode opposite to the semiconductor chip; and metal wiring connected to the metal layer via a bonding part such that the boding part is disposed on a surface of the metal layer and intervenes between the metal layer and the metal wiring, wherein the metal layer is either made of Sn, or an alloy essentially consisting of Sn, the metal wiring is either made of one of Ag and Cu or an alloy essentially consisting of one of Ag and Cu, the bonding part has an alloy region harder than the metal wiring, defining a first interface that is between the metal layer and the bonding part, the first interface invades the metal layer by penetrating toward the metal layer from the surface of the metal layer, and defining a second interface that is between the bonding part and the metal wiring, the second interface invades the metal wiring by penetrating toward the metal wiring from the surface of the metal layer.
8. The semiconductor device according to claim 7, wherein a flat region is formed on the metal wiring, the flat region being positioned at a side opposite from the bonding part, a longitudinal length of the flat region, which is determined in a wiring direction along which the metal wiring extends, is substantially the same as a length of the bonding part, which is determined in the wiring direction.
9. The semiconductor device according to claim 8, wherein the flat region is shaped while the bonding part is formed by ultrasonic being applied to the metal wiring.
10. A semiconductor device comprising: a semiconductor chip; a metal electrode formed on a surface of the semiconductor chip; and metal wiring connected to the metal electrode via a bonding part, wherein an outer peripheral of the metal wiring is covered with a metal layer consisting of a metal or an alloy different from a constituent metal of the metal electrode, the bonding part has an alloy region harder than the metal wiring, the bonding part contacts the metal electrode and the metal wiring, a flat region is formed on the metal wiring that is covered by the metal layer, the flat region being positioned at a side opposite from the bonding part, and a longitudinal length of the flat region, which is determined in a wiring direction along which the metal wiring extends, is the same as a length of the bonding part, which is determined in the wiring direction.
11. The semiconductor device according to claim 10, wherein the metal layer is an alloy essentially consisting of Zn and Al, and the metal wiring is one of Ag, Al, Au, Cu, and an alloy essentially consisting of one of Ag, Al, Au, and Cu.
12. The semiconductor device according to claim 10, wherein the metal layer is an alloy essentially consisting of Au, and the metal wiring is one of Al, Cu, and an alloy essentially consisting of Al and Cu.
13. The semiconductor device according to claim 10, wherein the metal layer is one of Sn and an alloy essentially consisting of Sn, and the metal wiring is one of Ag, Au, Cu, and an alloy essentially consisting of one of Ag, Au, and Cu.
14. The semiconductor device according to claim 10, wherein the flat region is shaped while the bonding part is formed by ultrasonic being applied to the metal wiring.
Description
BRIEF DESCRIPTION OF DRAWINGS
(1)
(2)
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(5)
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(11)
DESCRIPTION OF EMBODIMENTS
(12) Hereinafter, a semiconductor device according to the first embodiment of the present invention will be described with reference to
(13)
(14) Here, a bonding process of the bonding structure of the semiconductor device 100 illustrated in
(15) Next, this laminated structure is heated to 419 C. (that is, the melting point of Zn) or higher. This results in formation of a eutectic alloy of Zn and Al, in which Al is mixed in the Zn layer at a ratio from 2.4 at % to 33 at % as illustrated in
(16) Next, as illustrated in
(17) Because the bonding part 150 formed through the bonding process as illustrated
(18)
(19) Next, a result of examining the bonding strength of a bonding structure in a sample of the semiconductor device according to the first embodiment of the present invention will be described.
(20)
(21) As apparent from
(22) Note that the embodiment described above illustrates the example where the Al wire is used as the metal wiring 140; however, a similar structure can be implemented even when the metal wiring 140 consists of Cu or an alloy mainly/essentially consisting of Cu. Generally, when Cu is mixed in an AlZn alloy system, the liquidus temperature decreases, and Cu dissolves proactively in the liquid phase AlZn alloy. Thus, the bonding part 150 is alloyed like in the above embodiment.
(23) The metal layer 130 may be a metal mainly/essentially consisting of Au such as an AuGe alloy, and the metal electrode 120 and the metal wiring 140 may be selected from group consisting of Al, Cu, and an alloy mainly/essentially consisting of these. Alternatively, the metal layer 130 may be an alloy mainly/essentially consisting of Sn (for example, SnAgCu based (SAC) solder), and the metal electrode 120 and the metal wiring 140 may be selected from group consisting of Ag, Au, Cu and an alloy mainly/essentially consisting of these. For example, in the case where the metal layer 130 is an SAC solder, when such a bonding structure is heated to about 230 C. (that is, the melting point of Sn) after ultrasonic bonding, Sn is turned into a liquid phase but then soon form an intermetallic compound with a metal of the metal wiring 140, and a solidus line rises. Therefore, Sn in the liquid phase disappears at the applied temperature, and the bonding part 150 is alloyed. These intermetallic compounds generally have a high hardness to improve the reliability of the bonding part 150. Note that a heating temperature is more preferably 230 C.30 C.
(24)
(25)
(26) In
(27) Next, a semiconductor device according to the second embodiment of the present invention will be described with reference to
(28)
(29) According to such a configuration, a structure with high connection reliability can be implemented by using the metal wire 340 covered with the metal layer 330 without performing the pretreatment of disposing the metal layer 330 on the metal electrode 320 of the semiconductor chip 310 in advance. Note that, also in this bonding structure, combinations of metals exemplified above can be used.
(30) Next, a semiconductor device according to the third embodiment of the present invention will be described with reference to
(31)
(32) A metal electrode 420 is formed on the semiconductor chip 410 illustrated in
(33) According to such a configuration, the metal electrode 420 of the semiconductor chip 410 and the metal electrode 421 of the insulating plate 460 are bonded via the bump 440. This results in saving the space and facilitating positioning. In addition, because the alloyed bonding parts 450 and 451 having a higher hardness than that of the bump 440 are formed between the bump 440 and the metal electrodes 420 and 421, high connection reliability can be ensured even after exposure of the temperature cycles.
(34) Although specific embodiments of the semiconductor device according to the present invention and modifications based thereon have been described above, the present invention is not necessarily limited thereto, and other structures are also within the scope of the present invention as long as they meet the scope of claims of the present invention.
REFERENCE SIGNS LIST
(35) 100, 300 Semiconductor device 110, 310, 410 Semiconductor chip 120, 220, 320, 420, 421 Metal electrode 130, 230, 330, 430, 431 Metal layer 140, 340, 440 Metal wiring 150, 250, 350, 450, 451 Bonding part 200, 400 Mounting structure 210, 460 Insulator (substrate), insulating plate