Electronic device furnished with a conducting layer and method of fabrication

Abstract

An electronic device includes a support board having a mounting face and an integrated circuit chip mounted on the mounting face. An encapsulation block embeds the integrated circuit chip, the encapsulation block extending above the integrated circuit chip and around the integrated circuit chip on the mounting face of the support board. The encapsulation block includes a front face with a hole passing through the encapsulation block to uncovering at least part of an electrical contact. A layer made of an electrically conducting material fills the hole to make electrical connection to the electrical contact and further extends over the front face of the encapsulation block.

Claims

1. A method for fabricating an electronic device, comprising: producing a hole through an encapsulation block of a primary electronic device comprising a support board and an integrated circuit chip mounted on a mounting face of the support board, said hole at least partially uncovering an electrical contact, the encapsulation block having a front face parallel to the support board; depositing an electrically conducting liquid or pasty material on at least one zone of the front face of the encapsulation block and in the hole; and hardening the electrically conducting liquid or pasty material so as to produce a conducting layer connected to the electrical contact.

2. The method according to claim 1, further comprising: producing a groove in the front face of the encapsulation block, said groove emerging in the hole; wherein depositing further comprises depositing the electrically conducting liquid or pasty material in said groove.

3. The method according to claim 2, wherein producing the groove comprises forming the groove to have a spiral shape.

4. The method according to claim 1, wherein producing the hole comprises producing at least two holes through the encapsulation block of the primary electronic device so as to at least partially uncover two electrical contacts; wherein depositing comprises depositing the electrically conducting liquid or pasty material on the at least one zone of the front face of the encapsulation block and in the two holes; and wherein hardening comprises hardening the electrically conducting liquid or pasty material so as to produce the conducting layer that is electrically connected to said two electrical contacts.

5. The method according to claim 1, wherein the electrically conducting liquid or pasty material is a resin containing electrical conducting metallic particles.

6. The method according to claim 1, wherein the electrical contact is located on the mounting face of the support board at a position located remote from a periphery of the integrated circuit chip.

7. The method according to claim 1, wherein the electrical contact is located on surface of the integrated circuit chip.

8. The method according to claim 7, further comprising forming the integrated circuit chip with a through silicon via connected to the electrical contact.

9. The method according to claim 1, wherein depositing comprises completely filling the hole with the electrically conducting liquid or pasty material.

10. The method according to claim 1, wherein depositing comprises using a syringe to deposit the electrically conducting liquid or pasty material.

11. The method according to claim 10, further comprising scraping a spatula over the front face of the encapsulation block to make an upper surface of the deposited electrically conducting liquid or pasty material coplanar with the front face of the encapsulation block.

12. The method according to claim 1, wherein hardening comprises applying a radiation to the electrically conducting liquid or pasty material.

Description

BRIEF DESCRIPTION OF THE DRAWINGS

(1) Electronic devices and their modes of fabrication will now be described by way of exemplary embodiments, illustrated by the drawing in which:

(2) FIG. 1 represents a section through an electronic device;

(3) FIG. 2 represents a view from above of the electronic device of FIG. 1;

(4) FIG. 3 represents a step of fabrication, in section, of the electronic device of FIG. 1;

(5) FIG. 4 represents another step of fabrication, in section, of the electronic device of FIG. 1;

(6) FIG. 5 represents another step of fabrication, in section, of the electronic device of FIG. 1;

(7) FIG. 6 represents another step of fabrication, in section, of the electronic device of FIG. 1;

(8) FIG. 7 represents a section through another electronic device; and

(9) FIG. 8 represents a section through another electronic device.

DETAILED DESCRIPTION

(10) As illustrated in FIGS. 1 and 2, according to an exemplary embodiment a final electronic device 1 comprises a support board 2, including an electrical connection network 3, an integrated circuit chip 4 mounted on a front mounting face 5 of the support board 2 and an encapsulation block 6 in which the chip 4 is embedded and which extends over the chip 4, around the latter, on the mounting face 5 of the support board 2, in such a way that the electronic device 1 takes the form of a parallelepiped.

(11) According to one variant embodiment represented, the integrated circuit chip 4 is mounted on a mounting face 5 of the support board 2 by way of electrical connection elements 7, such as balls, which selectively link the chip 4 and the electrical connection network 3. According to another variant embodiment, the chip 4 could be glued on the mounting face 5 of the support board 2 and be linked to the electrical connection network 3 by electrical connection wires embedded in the encapsulation block 6.

(12) According to one variant embodiment represented, the encapsulation block 6 exhibits a through hole 8 fashioned from a front face 9 of this block, parallel to the support board 2, until uncovering an electrical contact 10 of the electrical connection network fashioned on the mounting face 5 of the contact board. The through hole 8 is situated remote from the periphery of the chip 4 and from the periphery of the primary encapsulation block 6 and between same.

(13) In the front face 9 of the encapsulation block 6 is fashioned an elongate groove 11 which emerges in the hole 8. For example, the groove 11 can pass above and remote from the chip 4.

(14) The encapsulation block 6 is furnished with a layer 12 made of an electrically conducting material, extended over a zone of its front face 9 and which approximately fills the through hole 8 so as to be connected to the electrical contact 10 in this hole.

(15) More precisely, the conducting layer 12 extends in the groove 11 so as to approximately fill this groove 11. The layer 12 is held by an adhesion effect on the encapsulation block 6.

(16) The conducting layer 12 can be made of a hardened resin including electrically conducting metallic particles.

(17) Moreover, the electronic device 1 can be furnished with elements for exterior electrical connection 3a, such as balls, disposed on electrical contacts 3b of the electrical connection network 3 fashioned on a face 2a of the support board 2, opposite the mounting face 5, these electrical contacts 3b being linked selectively to the electrical connection network 3 of the support board 2.

(18) The final electronic device 1 can be produced in the following manner.

(19) As illustrated in FIG. 3, use is made of a prefabricated primary electronic device 13 which comprises the support board 2, the chip 4 mounted as described above and the encapsulation block 6, the latter exhibiting a completely flat front face 9.

(20) As illustrated in FIG. 4, the hole 8 and the elongate groove 11 are produced.

(21) Next, according to a variant embodiment illustrated in FIG. 5, a conducting layer 12 made of a liquid or pasty material, that is to say one able to creep or flow, is deposited in the hole 8 and in the groove 11 by means of a mobile syringe 14, the quantity of material deposited being able to approximately fill the hole 8 and the groove 11, the latter constituting a barrier to the creep of the material.

(22) Or else, according to another variant embodiment illustrated in FIG. 6, a quantity of conducting material 15 largely filling the hole 8 and the groove 11 is deposited and a scraping of this deposited material 15 is undertaken by means of a spatula 16 by moving the latter over the front face 9 of the encapsulation block 6 so as to leave only the conducting layer 12.

(23) Next, a hardening of the deposited layer 12 is undertaken, for example under the effect of a radiation.

(24) As illustrated in FIG. 7, according to another exemplary embodiment a final electronic device 17 is differentiated from the electronic device 1 described previously by the fact that, this time, the conducting layer 12 is linked directly to a specific electrical contact 18 provided on the front face 19 of the chip 4. The specific electrical contact 18 can result from the formation of an electrical link passing through the substrate of the integrated circuit chip 4, known by the name TSV (Through Silicon Via).

(25) In this exemplary embodiment, the fabrication step equivalent to that described with reference to FIG. 4 consists in producing a hole 20 in a location situated above the chip 4, through an encapsulation block 6, so as to uncover the electrical contact 18, and in producing a groove 21 emerging in this hole 20. The following steps in producing a conducting layer 12 are equivalent to those described with reference to FIGS. 5 and 6.

(26) The electronic devices which have just been described can arise from a collective fabrication on a common support plate. The encapsulation blocks and the extra encapsulation blocks can be obtained by spreading of a liquid material, for example an epoxy resin, and then by hardening of this material.

(27) The electronic devices which have just been described can arise from collective fabrication on a common support plate, as is known in the field of microelectronics.

(28) Of course, the conducting layer 12 can exhibit any desired topographical shape.

(29) The conducting layer 12 of the electronic devices which have just been described can advantageously constitute an electromagnetic antenna for the transmission/reception of radiofrequency signals at very high frequencies (reaching a gigahertz or greater than a gigahertz, or indeed several hundred gigahertz), linked to the chip 4 by short electrical connection paths, via the electrical connection network of the support board 2 (FIGS. 1-2) or directly (FIG. 7).

(30) Nonetheless, according to a variant embodiment illustrated in FIG. 8, a conducting layer 12, for example produced in the form of a strip, can constitute an extra passive electronic component, such as a resistance or a choke, whose ends can be linked to the chip 4, via the electrical connection network 3 and/or directly, thereby constituting a bridge.

(31) Accordingly, the ends of this conducting layer 12 can be linked, via two holes 22 and 23 fashioned through the encapsulation block 6 from its front face, in a manner equivalent to that described previously, to electrical contacts 24 and 25 fashioned either on the front face of the support board 2, or on the front face of the chip 4, or one on the front face of the support board and the other on the front face of the chip.