Semiconductor module with a first substrate, a second substrate and a spacer separating the substrates from each other
12125817 · 2024-10-22
Assignee
Inventors
- Martin Becker (Flensburg, DE)
- André Bastos Abibe (Flensburg, DE)
- Ronald Eisele (Flensburg, DE)
- Jacek Rudzki (Flensburg, DE)
- Frank Osterwald (Flensburg, DE)
- David Benning (Flensburg, DE)
Cpc classification
H01L2224/83022
ELECTRICITY
H01L2224/83193
ELECTRICITY
H01L2224/83203
ELECTRICITY
H01L2924/00012
ELECTRICITY
H01L2224/29294
ELECTRICITY
H01L2224/83901
ELECTRICITY
H01L2224/32225
ELECTRICITY
H01L2224/83191
ELECTRICITY
H01L2224/04026
ELECTRICITY
H01L23/49833
ELECTRICITY
H01L2224/29294
ELECTRICITY
H01L2224/40225
ELECTRICITY
H01L2924/00014
ELECTRICITY
H01L2224/4813
ELECTRICITY
H01L2924/00014
ELECTRICITY
H01L2924/00012
ELECTRICITY
H01L2224/2612
ELECTRICITY
H01L2224/32227
ELECTRICITY
H01L2224/83209
ELECTRICITY
H01L2224/83209
ELECTRICITY
H01L2224/83203
ELECTRICITY
H01L2224/29019
ELECTRICITY
H01L2224/83901
ELECTRICITY
H01L24/73
ELECTRICITY
International classification
Abstract
Semiconductor module having a first substrate, a second substrate and a spacer distancing the substrates from each other, wherein the spacer is formed by at least one elastic shaped metal body.
Claims
1. A semiconductor module having a first substrate, a second substrate and a spacer disposed in a plane separating the substrates from each other, wherein a semiconductor is disposed between the first substrate and the second substrate, wherein the spacer is formed by at least a first elastic wave-shaped metal body and a second elastic wave-shaped metal body, wherein the first and second wave-shaped metal bodies are at least partially stacked in a direction transverse to the plane separating the substrates, and wherein one wave-shaped metal body is connected to the semiconductor while the other wave-shaped metal body is connected to one of the first or second substrate.
2. The semiconductor module according to claim 1, wherein the semiconductor is firmly bonded to one of the first or the second substrate.
3. The semiconductor module according to claim 1, wherein the spacer electrically connects the semiconductor with the other of the substrates.
4. The semiconductor module according to claim 1, wherein the first substrate and/or the second substrate is a direct copper bonding substrate.
5. The semiconductor module according to claim 1, wherein at least one of the first or second shaped metal body is made to be elastic so that the application of pressure in a first direction causes an expansion in a second direction.
6. The semiconductor module according to claim 5, wherein the spacer includes a plurality of shaped metal bodies oriented in different directions with respect to each other.
7. The semiconductor module according to claim 1, wherein the spacer is configured to yield laterally when pressure from a substrate acting in the direction of the semiconductor is applied substantially vertically to the semiconductor.
8. The semiconductor module according to claim 1, wherein the shaped metal body connected to the semiconductor is disposed on the semiconductor in a planar way in the plane between the substrates.
9. The semiconductor module according to claim 1, wherein at least one of the first or second shaped metal body is configured to have crests and troughs extending in a first direction of the plane separating the substrates.
10. The semiconductor module according to claim 1, wherein at least one of the first or second shaped metal body is slotted.
11. The semiconductor module according to claim 9, wherein at least one of the first or second shaped metal body is slotted transversely to the bent, folded or wavy configuration first direction.
12. The semiconductor module according to claim 1, wherein deflected portions of the shaped metal bodies which contact the semiconductor and the other substrate are made to be electrically contacting.
13. The semiconductor module according to claim 1, wherein at least one of the first or second shaped metal body is a film.
14. The semiconductor module according to claim 1, wherein at least one of the first or second shaped metal bodies is connected to the semiconductor or to the other substrate by sintering.
15. The semiconductor module according to claim 1, wherein the first and second shaped metal bodies are connected to each other transversely to the plane separating the substrates.
16. The semiconductor module according to claim 15, wherein the two shaped metal bodies are of identical design.
17. The semiconductor module according to claim 1, wherein one shaped metal body is connected to the semiconductor by sintering while the other shaped metal body is connected to the other substrate by sintering.
18. The semiconductor module according to claim 1, wherein one shaped metal body is connected to the semiconductor by sintering while the other shaped metal body is connected to the other substrate by nanowires.
19. The semiconductor module according to claim 1, wherein the distance between the surface of the first substrate and the surface of the second substrate is in the range of 0.8 mm to 2 mm.
20. The semiconductor module according to claim 1, wherein the semiconductor is at least partly made of silicon carbide (SiC).
21. A method for producing a semiconductor module, characterized by the following steps: disposing a semiconductor between two substrates, disposing a spacer comprising a first elastic wave-shaped metal body and a second elastic wave-shaped body between the substrates, wherein the first and second wave-shaped bodies are at least partially stacked in a direction transverse to a plane separating the substrates to produce a predefined distance between the substrates, and connecting the substrates, the first and second wave-shaped bodies and the semiconductor to each other.
22. The method of claim 21, wherein establishing a first direct electrical connection between one substrate and the semiconductor and a second electrical connection between the semiconductor and the other substrate is conveyed through the spacer.
23. The method according to claim 21, wherein the connecting takes place by means of sintering.
24. The method according to claim 21, wherein the connecting takes place by means of nanowires.
Description
BRIEF DESCRIPTION OF THE DRAWINGS
(1) The invention is explained in greater detail below with reference to a particularly preferred embodiment shown in the attached drawings, in which:
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DETAILED DESCRIPTION
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(10) The waveform of the spacer 40, which is similar to a meander in cross-section, provides for increased elastic behavior in at least one axis. A geometric relief can be realized by means of further structural measures in a further axis parallel to the surface of a semiconductor 20 disposed between the substrates 10, 10. A spacer is thus obtained which, due to its elastic properties in the lateral plane, transmits only small thermomechanical stresses to the semiconductor, despite a considerable thickness of about 0.8 to 2 mm inclusively.
(11) If the spacers 40 are elastically deformable in one direction in the plane of the semiconductor 20, a plurality of spacers 40, which are aligned in the same direction with respect to an elastic deformation, may be provided in a semiconductor module 100.
(12) However, it is particularly preferred, as
(13) If the distance between the upper substrate 10 and the surface of the semiconductor 20 is too large, as shown in
(14) When assembling the lower substrate 10 and the upper substrate 10 equipped with semiconductor 20, the waveform of the spacer 50 is deformed both in the vertical direction and in the lateral direction. The tips of the wave crests then glide over the surfaces to be contacted and perform a cleaning effect. It is, above all, possible to thus break open oxide layers of aluminum semiconductor metallizations. This leads to an electrically and thermally highly conductive connection to the semiconductor 20, without the latter necessarily having to be coated with a noble metal surface.
(15) These wave-shaped shaped metal bodies used as spacers 40 can be simply placed in a wet sintering paste 50 applied to the semiconductor surface in a rapid assembly process. The semiconductor has already been firmly and reliably connected to the substrate 10 (or a lead frame) by means of the connection layer 30 in an upstream hydrostatic sintering process. The upper substrate 10 (or a lead frame) also carries along a silver paste deposit 50. The upper substrate 10 is then aligned and merged with the lower substrate 10. As a result, the contact with the spacers 40 is closed despite a notable distance of 0.8 to 2 mm.
(16) This technology is particularly advantageous for fast switching SiC modules because they can take advantage of the highly reliable sintered connection in a sandwich structure.
(17) Alternatively, the semiconductor 20 and the spacer 4o can be connected using electrically conducting nanowires. Such nanowires are grown from one or more of the surfaces to be connected, and then the surfaces are brought together. The joining takes place under compression and possibly with a raised temperature. However, the technique is admirably suited to the current invention, since it can successfully be used with relatively low pressures, thus enabling the connection of components utilizing the spacer 40 without damaging the elastic properties of the spacer 40. The pressure used for bonding may be up to 70 MPa, but in some situations it may be as low as 1 MPa. The nanowires may typically comprise copper or gold, nickel, silver, platinum, or other suitable metals. Typically they may have a diameter of between 30 nm and 2 m and have a length of between 500 nm and 50 m. A potential great advantage of the use of nanowires, is that the joint formed is flexible, and thus the stresses around the items being joined, such as a semiconductor chip or a substrate, is reduced. This in turn leads to much improved reliability and module life.
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(21) While the present disclosure has been illustrated and described with respect to a particular embodiment thereof, it should be appreciated by those of ordinary skill in the art that various modifications to this disclosure may be made without departing from the spirit and scope of the present disclosure.