Method for fabricating semiconductor package with stator set formed by circuits
09679826 ยท 2017-06-13
Assignee
Inventors
Cpc classification
H01L21/486
ELECTRICITY
H01L21/78
ELECTRICITY
H01L21/4853
ELECTRICITY
H01L2924/00014
ELECTRICITY
H05K2201/09063
ELECTRICITY
H01L23/49811
ELECTRICITY
H05K1/0272
ELECTRICITY
H01L21/71
ELECTRICITY
H01L2924/00014
ELECTRICITY
H01L23/5227
ELECTRICITY
H05K1/0209
ELECTRICITY
International classification
H04L21/00
ELECTRICITY
H01L23/498
ELECTRICITY
H01L21/78
ELECTRICITY
H01L21/48
ELECTRICITY
H05K1/16
ELECTRICITY
H01L21/71
ELECTRICITY
Abstract
A semiconductor package is provided, including a substrate having a top surface, a bottom surface opposing the top surface, a via communicating the top surface with the bottom surface, and a stator set formed by circuits; an axial tube axially installed in the via of the substrate; a plurality of electronic components mounted on the top surface of the substrate and electrically connected to the substrate; an encapsulant formed on the top surface of the substrate for encapsulating the electronic components and the axial tube; and an impeller axially coupled to the axial tube via the bottom surface of the substrate. In the semiconductor package, the stator set is formed in the substrate by a patterning process. Therefore, the thickness of the semiconductor package is reduced significantly.
Claims
1. A method of fabricating a semiconductor package, comprising: mounting a plurality of electronic components on a substrate having a stator set formed by circuits, a top surface, a bottom surface opposing the top surface, and a via communicating the top surface with the bottom surface, axially disposing an axial tube in the via, and forming an encapsulant on the top surface of the substrate for encapsulating the electronic components and the axial tube; cutting the substrate; and axially coupling an impeller to the axial tube via the bottom surface of the substrate.
2. The method of claim 1, wherein the substrate further comprises a core layer having a first surface and a second surface opposing the first surface, and the substrate is fabricated by: forming spiral circuits that act as the stator set on the first surface and the second surface of the core layer; covering the first surface and the second surface of the core layer with a first solder-resistant layer and a second solder-resistant layer of the stator set, respectively; and forming a via communicating the top surface with the bottom surface.
3. The method of claim 2, wherein the stator set comprises a first spiral circuit formed on the first surface of the core layer and covered by the first solder-resistant layer, a second spiral circuit formed on the second surface of the core layer and covered by the second solder-resistant layer, and at least a conductive via penetrating the core layer of the substrate for electrically connecting the first spiral circuit with the second spiral circuit.
Description
BRIEF DESCRIPTION OF DRAWINGS
(1) The invention can be more fully understood by reading the following detailed description of the preferred embodiments, with reference made to the accompanying drawings, wherein;
(2)
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DETAILED DESCRIPTION OF THE INVENTION
(9) The following illustrative embodiments are provided to illustrate the disclosure of the present invention, these and other advantages and effects can be apparently understood by those in the art after reading the disclosure of this specification. The present invention can also be performed or applied by other different embodiments. The details of the specification may be on the basis of different points and applications, and numerous modifications and variations can be devised without departing from the spirit of the present invention.
(10) A method of fabricating a semiconductor package of a first embodiment according to the present invention is described as follows.
(11) In a method of fabricating a semiconductor package according to the present invention, a substrate is provided that comprises a stator set formed by circuits, a top surface, a bottom surface opposing the top surface, and a via communicating the top surface with the bottom surface, an axial tube is installed in the via, and an encapsulant encapsulates the electronic component and the axial tube.
(12) There is no limit on the sequence of installing the electronic component and the axial tube.
(13)
(14) As shown in
(15) In an embodiment, the circuit layer 201 and the stator set 202 are formed at the same time. In another embodiment, the circuit layer 201 and the stator set 202 are formed sequentially. Then, a first solder-resistant layer 203 and a second solder-resistant layer 204 are formed on the first surface 200a and the second surface 200b of the core layer 200, respectively, to cover the circuit layer 201 and the stator set 202.
(16) In an embodiment, As shown in the cross-sectional diagram of
(17) In an embodiment, the axial tube 30 protrudes from the top surface 20a of the substrate 20, and the via 20c that is used for the axial tube 30 to be installed therein has an end disposed on the top surface 20a of the substrate 20 that is covered by the axial tube 30.
(18) As shown in
(19) In an embodiment, the method according to the present invention disposes an electronic component 21 on the top surface 20a or the bottom surface 20b of the substrate 20, and forms the encapsulant 22 to encapsulate the electronic component 21.
(20) In an embodiment, shown in
(21) As shown in
(22) As shown in
(23) Referring to
(24) As shown in
(25) When the air vent 23 is formed and the semiconductor package is in operation, airflow S provides air and conveys the heat away from the semiconductor package, to enhance the heat-dissipating efficacy.
(26) In a second embodiment, an electronic component 21 is imbedded in the core layer 200 of the substrate 20. As shown in
(27) In a third embodiment, a semiconductor package further has an externally-connected component stacked.
(28) In an embodiment shown in
(29) In the previously described semiconductor package 2, the via 20c is disposed on a center or at a region away from the center (not shown). When the via 20c is disposed at the region away from the center, the top surface 20a of the substrate 20 has more area left for the electronic component 21 to be disposed thereon.
(30) According to the previously described method, in the semiconductor package 2 according to the present invention the substrate 20 comprises a core layer 200 having a first surface 200a and a second surface 200b opposing the first surface 200a, a first solder-resistant layer 203 formed on the first surface 200a and having a surface corresponding to the top surface 20a of the substrate 20, and a second solder-resistant layer 204 formed on the second surface 200b and having a surface corresponding to the bottom surface 20b of the substrate 20. In an embodiment, the stator set 202 is formed by spiral circuits on the first surface 200a and the second surface 200b of the core layer 200, and is covered by the first solder-resistant layer 203 and the second solder-resistant layer 204.
(31) In the previously described semiconductor package 2, the electronic component 21 is disposed in the substrate 20 or the top surface 20a of the substrate 20 and encapsulated by the encapsulant 22, and the substrate 20 further comprises a circuit layer 201. The previously described semiconductor package 2 further comprises a conductive element 40 disposed in the encapsulant 22 and electrically connected to the circuit layer 201 of the substrate 20, and the conductive element 40 has an end exposed from the encapsulant 22 for the externally-connected component 42 to be disposed thereon and electrically connected thereto. In an embodiment, the externally-connected component 42 comprises a packaged unit or a semiconductor chip.
(32) The previously described semiconductor package 2 further comprises at least an air vent 23 penetrating the top surface 20a and the bottom surface 20b of the substrate and the encapsulant 22, to form an axially air passage.
(33) The previously described semiconductor package 2 further comprises an outer cover 22 formed on the substrate 20 and surrounding an impeller 31 to be installed sequentially. In an embodiment, the outer cover 22 can be formed by an encapsulant, so as to simplify the fabrication process.
(34) In a fourth embodiment, a semiconductor package has airflow enhanced.
(35)
(36) As shown in
(37) As shown in a bottom view of
(38) In a fifth embodiment shown in
(39) In the semiconductor package according to the present invention, since the stator set is formed in a spiral form and is directly formed on the core layer in the substrate, the overall thickness of the semiconductor package is reduced significantly. According to the present invention, the electronic component does not need to be disposed between the base of the housing and the hub of the impeller. Therefore, the heat generated by the electronic component can be dissipated effectively, the thickness of the encapsulant can be controlled, the overall thickness of the package after the impeller is carried thereby is reduced, and the electronic product can meet the compact-size and low-profile requirements. According to the present invention, the control chip is disposed at a predetermined position on the substrate, and will not interfere the airflow generated by the impeller in operation. Therefore, the present invention will not suffer from the noise or vibration problem.
(40) According to the present invention, at least an air vent is pre-installed on the substrate or penetrates the substrate after the encapsulant is formed. Therefore, the heat generated by the electronic component can be dissipated via an airflow channel under the substrate of the semiconductor package. Since the impeller and the electronic component are disposed on two opposing surfaces, respectively, the exposure problem of the axial tube during a packaging process is solved, and the packaging process can be performed easily.
(41) The foregoing descriptions of the detailed embodiments are only illustrated to disclose the features and functions of the present invention and not restrictive of the scope of the present invention. It should be understood to those in the art that all modifications and variations according to the spirit and principle in the disclosure of the present invention should fall within the scope of the appended claims.