Glass/ceramic replacement of epoxy for high temperature hermetically sealed non-axial electronic packages

Abstract

A high temperature, non-cavity package for non-axial electronics is designed using a glass ceramic compound with that is capable of being assembled and operating continuously at temperatures greater that 300-400 C. Metal brazes, such as silver, silver colloid or copper, are used to connect the semiconductor die, lead frame and connectors. The components are also thermally matched such that the packages can be assembled and operating continuously at high temperatures and withstand extreme temperature variations without the bonds failing or the package cracking due to a thermal mismatch.

Claims

1. A high temperature, non-cavity package for non-axial electronics comprising: a lead frame comprising a die pad and at least one lead extending therefrom; at least one semiconductor die, the semiconductor die bonded to the pad, lead frame with a first metal braze comprising a silver colloid; a connector adapted to provide electrical interconnections between the at least one lead and the at least one semiconductor die, the connector bonded to the die and the pad, lead frame with a second metal braze, said second metal braze comprising said silver colloid; and a glass ceramic compound encapsulating the at least one semiconductor die, the die pad, the connector and a portion of the at least one lead, wherein said glass ceramic compound is heated to chemically bond said glass ceramic compound to said metal plated pad, said semiconductor die, and said connector to form a hermetically sealed electronic package; wherein the package is non-cavity and void-less, the connector, the pad, lead frame, the semiconductor die and the glass ceramic compound are thermally matched and wherein the glass ceramic compound has a CTE <5.010.sup.6 and a transition temperature >450 C.

2. The package of claim 1, wherein the glass ceramic compound is adapted to surround and hermetically seal the at least one semiconductor die, the die pad, the connector and the portion of the at least one lead in a void-less electronic package.

3. The package of claim 1, wherein the pad, lead frame, the connector, and the glass ceramic compound are thermally matched.

4. The package of claim 3, wherein the glass ceramic has a CTE between about <5.010.sup.6.

5. The package of claim 3, wherein the glass ceramic has a CTE between about 3.4-4.810.sup.6.

6. The package of claim 3, wherein the glass ceramic has a transition temperature greater than about 450 C.

7. The package of claim 3, wherein the glass ceramic has a transition temperature between about 450 C.-550 C.

8. The package of claim 1, wherein the glass ceramic compound is lead borosilicate glass, zinc borosilicate glass or glass material with similar properties.

9. The package of claim 1, wherein at least one semiconductor die comprises a Silicon Carbide chip.

10. The package of claim 1, wherein at least one semiconductor die comprises a Gallium Arsenide chip.

11. The package of claim 1, wherein at least one semiconductor die comprises a Silicon chip.

12. The package of claim 1, wherein at least one semiconductor die comprises a Gallium Nitride chip.

Description

BRIEF DESCRIPTION OF THE DRAWINGS

(1) FIGS. 1a-1c are views of a semiconductor and connector bonded to a package site according to a method in accordance with the present invention to manufacture a semiconductor packaged device in a high temperature, hermetically sealed package.

(2) FIG. 2 is a top view of lead frame having a plurality package sites with a semiconductor and connector bonded thereon in according to a method in accordance with the present invention to manufacture a semiconductor packaged device in a high temperature, hermetically sealed package.

(3) FIG. 3 is a top view of lead frame having a plurality package sites with a semiconductor and connector bonded thereon and encapsulated in a glass ceramic compound in according to a method in accordance with the present invention to manufacture a semiconductor packaged device in a high temperature, hermetically sealed package.

(4) FIG. 4a is a top view of a single non-axial, void-less device package according to the present invention.

(5) FIG. 4b is a cross section of a non-axial, void-less device package incorporating metal to metal connections between the semiconductor die, connector and lead frame in accordance with an embodiment of the present invention

DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENT

(6) The invention provides an apparatus and method for manufacturing a hermetically sealed, void-less, non-axial electronic package that is capable of being assembled and operating at high temperatures. Semi-conductor dies made from Silicon Carbide, Gallium Arsenide, Gallium nitrate, diamonds or other high temperature semiconductors are capable of operating safely at temperatures of 300-400 C. and above, however, current electronic packages typically fail at 200 C. due to either the bonding between the components failing or cracking of the package because of thermal mismatch of the components. The present invention describes a novel process for providing metal on metal bonding between the semiconductor die and components and a glass ceramic compound that is thermally matched with the components in order to provide a package that is non-cavity, hermetically sealed and capable of operating at temperatures greater than 300-400 C. and withstanding wide thermal extremes.

(7) Referring to FIGS. 1a-c, a process for bonding the semiconductor chip and electrical interconnections to the lead frame or header using a metal braze is provided. FIG. 1a illustrates one of a plurality of package sites 10 on a lead frame 1 for use in manufacturing a plurality of semiconductor packages. Each package site 10 comprises a metal plated die pad 12a for attaching the semiconductor die and a plurality of leads 11a-b which are connected to the die to provide the external electrical connections from the die 1. The illustrated embodiment depicts a two pin-out (or lead) design, however, in alternative embodiments, lead frame 10 could have 1, 2, 3, 4, 5, 6, 7, 8, 9, 10 or any number of leads extending therefrom. In other embodiments for manufacturing a single electronic package, a shaped tungsten header with any number of leads may be used instead of a lead frame. The lead frame 10 is preferably made of tungsten or molybdenum which has a coefficient of thermal expansion that closely matches that of the semiconductor chip. In alternative embodiments, the lead frame may be made of copper so that the leads out are more bendable. In such embodiments a tungsten pad is attached to the lead frame between the lead frame and the die. The tungsten pad will have a similar thermal coefficient to the die.

(8) The lead frame 10 is plated with a layer of either nickel or silver depending upon the metallization of the semiconductor die to improve the die and connector attach quality. The metallization layer of the lead frame is chosen to match the metallization on the die and the type of connector used. For example, if a nickel plated clip is used as the connector, the die will be plated coated with a titanium barrier layer then plated with nickel layer and the lead frame will be nickel plated or nickel sintered and nickel plated. Alternatively, if a silver wedge is used with a silver plated clip or a silver wire bond is used for the connector, the die will be coated with a titanium barrier layer then plated with silver layer and the lead frame will be silver plated or nickel sintered and silver plated.

(9) In FIG. 1A, the semiconductor die 15 is bonded to the die pad 12a of lead frame 10. The semiconductor die 15 is bonded to the die pad 12a using a metal braze 13a such as silver/copper or silver colloid. In FIG. 1b, a metal braze 14a-b is dispensed on the semiconductor 15 and the lead 11b to attach the connector that will provide the electrical interconnection between the semiconductor die 15 and lead 11b. The metal braze is silver/copper or silver colloid, which have a bonding temperature of between 790 C. to 960 C., and therefore, will be able to withstand high glass flow temperatures of between about 680-750 C. necessary to form glass ceramic seal. As shown in FIG. 1c, in some embodiments a wire clip 16, such as a nickel plated tungsten clip, can be used to provide the electrical connection between the lead 11b and the semiconductor die 15. In alternative embodiments, other suitable connectors capable of withstanding the high glass flow temperatures known in the art such as silver plated clips or silver wire attached with silver wedge bonds may be used to make the electrical connections.

(10) As shown in FIGS. 2-3, once the semiconductor dies 15a-c and connectors 16a-c have been attached to the package sites 10a-c on the lead frame 1, the glass ceramic compound may be applied to encapsulate and seal each package site 10a-c. With reference to FIG. 2, an interface for the glass compound on the die is first formed by oxidizing the nickel plate on the die to which the glass will form a hermetic seal. As shown in FIG. 3, a glass ceramic compound is molded around each of the packages sites 10a-c to form packages 20a-c encapsulating and sealing the semiconductor die 15, clip 16 and at least part of the leads 11.

(11) In some embodiments, the lead frame 1 is placed in a mold and the mold is filled with a glass frit, or slurry, comprising the granulated glass suspended in alcohol or water. The frit is dried and then heated until the frit sinters into a glass ceramic seal on the lead frame. In alternative embodiments, the lead frame 1 is placed in a mold between two glass plates. The glass plates are heated to fuse the glass plates together around the lead frame. In other embodiments, it is envisioned that other molding processes known in the art such as injection molding or hot molding could also be used. Unlike plastic encapsulants which do not self fuse or seal to metal as well, when the glass is molded around the lead frame, the glass chemically bonds to the metal layer on the die and lead frame and fuses to itself to form a hermetic seal around the die and connector. In addition, because the glass, unlike epoxies, is a non-porous substance and the glass is molded around the die and connector, the resultant packages is non-cavity and void-less.

(12) The glass ceramic compound has a low coefficient of thermal expansion, which is thermally matched with the semiconductor chip, connector, lead frame and metal brazes. In some embodiments, the glass ceramic compound preferably has a CTE of less that 5.010.sup.6, more preferably between about 3.4-4.810.sup.6. In addition, the glass compound has a transition temperature of greater that 450 C., preferably between about 450-550 C. This allows for operation of the device and high operating temperature, for example about 300-400 C. and over extreme temperature ranges, for example from about 192 C. to about 400 C., without cracking of the package. In some embodiments, the glass ceramic compound is preferably made of lead borosilicate glass or zinc borosilicate glass; however, any glass ceramic compound having the above characteristics would fit within the scope and spirit of the invention.

(13) As discussed above, the methods described herein can be used to make individual electronic packages on a shaped tungsten header or simultaneously on a plurality of sites on a lead frame to make a plurality of semiconductor packages in a batch process. FIGS. 4a-b illustrates a high temperature, hermetically sealed, non-cavity, void-less semiconductor package 20 according to the present invention that has been singulated from lead frame 1. As shown in FIG. 4a, the illustrated package is a two pin out 11a-b design; however, it should be understood the methods and processes described herein can be used with any number of leads and any multiple pin packages known in the art, such as TO packages or other through-hole packages, SMD packages, e.g., Dpak, D2pak and SOIC, to provide packages that are hermetically sealed and capable of operating at higher temperatures needed for high temperature semiconductors such as silicon carbide, gallium arsenide, gallium nitride, diamond, or other high temperature semiconductors known in the art. The methods and processes can also be used to provide lower cost hermetically sealed packages for silicon chips.

(14) FIG. 4b illustrates a cross section of the semiconductor package 20 shown in FIG. 4a taken along the line 4b-4b. The glass compound 21 encapsulates and surrounds the die pad 12a (not shown), semiconductor die 15, connector 16, and first end of leads 11a-b in a non-cavity, void-less package 20. The metal brazes 14a-b between the connector 16a, die 15 and lead 11b and metal braze 13a between the die 15 and lead 11a are also encapsulated within the glass compound. Because the metal brazes have a bonding temperature of between 790 C. to 960 C., they are able to withstand the reflow temperatures of between about 680-750 C. needed to create the glass ceramic seal around the package site and additionally are able to withstand subsequent operating temperatures of between about 300-400 C., or even greater than about 400 C. which are optimal for high temperature semiconductors.

(15) In some embodiments, a heat sink may optionally be bonded to the semiconductor die or substrate. A heat sink is not necessary because silicon carbide dies are able to operate at higher temperatures and conduct heat and in addition the package is able to dissipate heat because of the thermal match. Likewise, the dies, and packages, can be made much smaller. All of which features make these packages advantageous for high performance and extreme environments such as automotive aerospace and harsh environmental applications. In some embodiments, in order to use a smaller die with more power, for example, a three amp diode can be used as a nine amp diode when a heat sink is added to the package. The heat sink may be bonded to the die or substrate using the same metallization layers as the die or ceramic substrate and with a metal brace as described above. The heat sink is then overmolded along with the rest of the components and encapsulated in the resultant electronic package

(16) The invention provides a cost-effective and robust solution to creating high temperature, hermetically sealed, non-axial semiconductor packages, and it should be clear to those skilled in the art that certain advantages of the invention have thereby been achieved. Other advantages, applications, and modifications of the invention may also be evident to those skilled in the art and would also fall within the scope and spirit of the present invention. The invention is solely defined by the following claims.