Abstract
A substrate structure includes a first substrate and a second substrate bonded thereon. The first substrate includes a first dielectric substrate, a first conductive via, a first bonding layer, and a first electroless metal block. The first bonding layer has a first opening exposing the first conductive via, and the first electroless metal block is positioned within the first opening. The second substrate includes a second dielectric substrate, a second conductive via, a second bonding layer, and a second electroless metal block. The second bonding layer has a second opening exposing the second conductive via, and the second electroless metal block is positioned within the second opening. The second bonding layer is bonded to the first bonding layer to define a non-metal contact interface. The second electroless metal block is bonded to the first electroless metal block to define a metal bonding contact interface.
Claims
1. A substrate structure, comprising: a first substrate, comprising a first dielectric substrate, a first conductive via extending through the first dielectric substrate, a first bonding layer, and a first electroless metal block, the first bonding layer configured on the first dielectric substrate and having a first opening exposing the first conductive via, the first electroless metal block positioned within the first opening and electrically connected to the first conductive via; and a second substrate, comprising a second dielectric substrate, a second conductive via extending through the second dielectric substrate, a second bonding layer, and a second electroless metal block, the second bonding layer configured on the second dielectric substrate and having a second opening exposing the second conductive via, the second electroless metal block positioned within the second opening and electrically connected to the second conductive via, the second substrate bonded to the first substrate, the second bonding layer bonded to the first bonding layer to define a non-metal contact interface, and the second electroless metal block bonded to the first electroless metal block to define a metal bonding contact interface.
2. The substrate structure as claimed in claim 1, wherein opposite two ends of the first conductive via are aligned with opposite two side surfaces of the first dielectric substrate, and opposite two ends of the second conductive via are aligned with opposite two side surfaces of the second dielectric substrate.
3. The substrate structure as claimed in claim 1, wherein a first opening diameter of the first opening is less than or equal to a first diameter of the first conductive via, and a second opening diameter of the second opening is less than or equal to a second diameter of the second conductive via.
4. The substrate structure as claimed in claim 3, wherein a ratio of the first opening diameter to the first diameter is between 0.25 and 1, and a ratio of the second opening diameter to the second diameter is between 0.25 and 1.
5. The substrate structure as claimed in claim 1, wherein a material of the first conductive via and a material of the second conductive via respectively comprise conductive paste.
6. The substrate structure as claimed in claim 1, wherein the first conductive via and the second conductive via respectively comprise a seed layer and a conductive material configured on the seed layer.
7. The substrate structure as claimed in claim 1, wherein a material of the first bonding layer and a material of the second bonding layer respectively comprise organic polymer material.
8. The substrate structure as claimed in claim 1, wherein the non-metal contact interface comprises a covalent bonding contact surface or a thermoplastic adhesive contact surface.
9. The substrate structure as claimed in claim 1, wherein a material of the first electroless metal block and a material of the second electroless metal block respectively comprise nano-twin copper.
10. The substrate structure as claimed in claim 1, further comprising: at least one build-up structure layer configured on at least one of the first substrate and the second substrate, and electrically connected to at least one of the first conductive via and the second conductive via.
Description
BRIEF DESCRIPTION OF THE DRAWINGS
[0017] FIG. 1A to FIG. 1I are cross-sectional schematic diagrams of a method for manufacturing a substrate structure according to an embodiment of the present invention.
[0018] FIG. 2 is a cross-sectional schematic diagram of a substrate structure according to an embodiment of the present invention.
[0019] FIG. 3 is a cross-sectional schematic diagram of a substrate structure according to another embodiment of the present invention.
[0020] FIG. 4 is a cross-sectional schematic diagram of a substrate structure according to another embodiment of the present invention.
DESCRIPTION OF THE EMBODIMENTS
[0021] The embodiments of the present invention may be understood in conjunction with the drawings, and the drawings of the present invention are also considered as part of the disclosure. It should be understood that the drawings of the present invention are not drawn to scale, and in fact, the dimensions of elements may be arbitrarily enlarged or reduced to clearly illustrate the features of the present invention.
[0022] FIG. 1A to FIG. 1I are cross-sectional schematic diagrams of a method for manufacturing a substrate structure according to an embodiment of the present invention. According to the method for manufacturing a substrate structure of this embodiment, first, please refer to FIG. 1A, a first dielectric substrate 112 is provided. The first dielectric substrate 112 has an upper surface 111 and a lower surface 113 opposite to each other, and at least one through hole (two through holes 115 are schematically illustrated) extending through the first dielectric substrate 112. In one embodiment, the material of the first dielectric substrate 112 is, for example, an inorganic material, wherein the inorganic material is, for example, glass, ceramic, or glass-ceramic. In one embodiment, the material of the first dielectric substrate 112 is, for example, a non-conductive composite material. In one embodiment, the thickness T of the first dielectric substrate 112 is, for example, between 100 micrometers and 400 micrometers. In one embodiment, the surface roughness of the first dielectric substrate 112, such as arithmetic mean roughness (Ra), is less than 10 nanometers. In one embodiment, the through hole 115 may be a through glass via (TGV). In one embodiment, the first diameter D of the through hole 115 is, for example, 20 micrometers to 150 micrometers.
[0023] Next, please refer to FIG. 1B, a seed layer S is formed on the upper surface 111 and the lower surface 113 of the first dielectric substrate 112 and on the hole walls of the through holes 115 by a dry process (such as a sputtering process), or by a wet process (such as an electroless plating process), or by a hybrid process (including dry and wet processes). The seed layer S may provide a good interface so that metal layers subsequently formed thereon may adhere more easily, which may reduce the risk of detachment or peeling. In one embodiment, the material of the seed layer S is, for example, titanium-copper.
[0024] Next, please refer to FIG. 1C, using the seed layer S as an electroplating seed layer, a conductive material C is electroplated on the seed layer S. In one embodiment, the conductive material C directly covers the seed layer S and completely fills the through holes 115, wherein the conductive material C adheres tightly to the seed layer S. In one embodiment, the material of the conductive material C is, for example, copper. In one embodiment, the conductive material C may also be formed only within the through holes 115 and on the upper surface 111 of the first dielectric substrate 112, or only within the through holes 115 and on the lower surface 113 of the first dielectric substrate 112.
[0025] Next, please refer to FIG. 1C and FIG. 1D simultaneously, the conductive material C and the seed layer S thereunder located on the upper surface 111 and the lower surface 113 of the first dielectric substrate 112 are removed by, for example, a chemical-mechanical-polishing process (CMP), so as to completely expose the upper surface 111 and the lower surface 113 of the first dielectric substrate 112. At this time, the seed layer S1 and the conductive material C1 located within the through holes 115 define the first conductive vias 114. The first end 114a and the second end 114b of the first conductive vias 114 opposite to each other are respectively aligned with the upper surface 111 and the lower surface 113 of the first dielectric substrate 112. So far, the first conductive vias 114 extending through the first dielectric substrate 112 have been completed.
[0026] Next, please refer to FIG. 1E, a first bonding layer 116 is formed on the upper surface 111 of the first dielectric substrate 112 by, for example, a coating method. In one embodiment, the material of the first bonding layer 116 is an organic polymer material, which may be, for example, a polyimide-based material or a photo-imageable based material. In one embodiment, the first bonding layer 116 may be pre-cured or fully cured. In one embodiment, the first bonding layer 116 may be a thermoplastic material. Subsequently, first openings 117 are formed on the first bonding layer 116 by laser drilling or exposure, wherein the first openings 117 expose the first ends 114a of the first conductive vias 114. In one embodiment, a first opening diameter G of the first openings 117 is less than or equal to a first diameter D of the first conductive vias 114. In one embodiment, a ratio of the first opening diameter G to the first diameter D is, for example, between 0.25 and 1.
[0027] Next, please refer to FIG. 1F, an electroless metal layer M is formed on the outer surface of the first bonding layer 116 by electroless plating, wherein the electroless metal layer M completely covers the outer surface of the first bonding layer 116. In one embodiment, the material of the electroless metal layer M is, for example, nano-twin copper (Nt-Cu).
[0028] Next, please refer to FIG. 1F and FIG. 1G simultaneously, a portion of the electroless metal layer M is removed by, for example, a chemical-mechanical-polishing process (CMP), so as to form first electroless metal blocks 118 aligned with the first bonding layer 116. So far, the fabrication of the first substrate 110 has been completed.
[0029] Afterwards, please refer to FIG. 1H, a second substrate 120 is provided, wherein the structure of the second substrate 120 is the same as the structure of the first substrate 110, and may refer to the fabrication method of FIG. 1A to FIG. 1G described above. In brief, the second substrate 120 includes a second dielectric substrate 122, second conductive vias 124 extending through the second dielectric substrate 122, a second bonding layer 126, and second electroless metal blocks 128. The second conductive vias 124 include seed layers S2 and conductive materials C2 configured on the seed layers S2. First ends 124a and second ends 124b of the second conductive vias 124 opposite to each other are respectively aligned with an upper surface 121 and a lower surface 123 of the second dielectric substrate 122 opposite to each other. The second bonding layer 126 is configured on the second dielectric substrate 122 and has second openings 127 exposing the second conductive vias 124. In one embodiment, the material of the second bonding layer 126 is an organic polymer material, which may be, for example, a polyimide-based material or a photo-imageable based material. The second electroless metal blocks 128 are positioned within the second openings 127 and electrically connected to the second conductive vias 124. A second opening diameter G of the second openings 127 is less than or equal to a second diameter D of the second conductive vias 124. In one embodiment, a ratio of the second opening diameter G to the second diameter D is, for example, between 0.25 and 1. In one embodiment, the material of the second electroless metal blocks 128 is, for example, nano-twin copper (Nt-Cu).
[0030] Finally, please refer to FIG. 1H and FIG. 1I, the second substrate 120 is placed above the first substrate 110, so that the second bonding layer 126 faces the first bonding layer 116, and the second electroless metal blocks 128 are aligned with the first electroless metal blocks 118. Subsequently, the second substrate 120 and the first substrate 110 are bonded at high temperature (such as 150 C. to 250 C.) and high pressure (such as greater than one atmospheric pressure), wherein the second substrate 120 is bonded to the first substrate 110, the second bonding layer 126 is bonded to the first bonding layer 116 to define a non-metal contact interface P1, and the second electroless metal blocks 128 are bonded to the first electroless metal blocks 118 to define a metal bonding contact interface P2. In one embodiment, the non-metal contact interface P1 may be a covalent bonding contact surface, i.e., a chemical bonding contact surface formed by atoms sharing electrons. In one embodiment, the non-metal contact interface P1 may be a thermoplastic adhesive contact surface, i.e., a contact surface formed by intermolecular forces rather than chemical bonding forces. So far, the fabrication of the substrate structure 100a has been completed.
[0031] Structurally, please refer to FIG. 1I again, the substrate structure 100a includes the first substrate 110 and the second substrate 120. The first substrate 110 includes the first dielectric substrate 112, the first conductive via 114 extending through the first dielectric substrate 112, the first bonding layer 116, and the first electroless metal block 118. The first bonding layer 116 is configured on the first dielectric substrate 112 and has the first opening 117 exposing the first conductive via 114. The first electroless metal block 118 is positioned within the first opening 117 and electrically connected to the first conductive via 114. The second substrate 120 includes the second dielectric substrate 122, the second conductive via 124 extending through the second dielectric substrate 122, the second bonding layer 126, and the second electroless metal block 128. The second bonding layer 126 is configured on the second dielectric substrate 122 and has the second opening 127 exposing the second conductive via 124. The second electroless metal block 128 is positioned within the second opening 127 and electrically connected to the second conductive via 124. The second substrate 120 is bonded to the first substrate 110, the second bonding layer 126 is bonded to the first bonding layer 116 to define the non-metal contact interface P1, and the second electroless metal block 128 is bonded to the first electroless metal block 118 to define the metal bonding contact interface P2.
[0032] In brief, in this embodiment, the second bonding layer 126 may be bonded to the first bonding layer 116 through chemical bonding or intermolecular forces to define the non-metal contact interface P1, while the second electroless metal block 128 is bonded to the first electroless metal block 118 through metal diffusion to define the metal bonding contact interface P2, thereby bonding the second substrate 120 to the first substrate 110 to form the substrate structure 100a having dielectric through hole(s) with high aspect ratio. Compared to the prior art, this embodiment does not require additionally adding resin material having conductive paste and/or adopting glass substrate with high thickness, and may have advantages of simple process, reduced cost, and increased production capacity. Furthermore, since the substrate structure 100a of this embodiment does not require additionally adding resin material having conductive paste, the electrical continuity among the first conductive via 114, the first electroless metal block 118, the second electroless metal block 128, and the second conductive via 124 enables the substrate structure 100a of this embodiment to have better electrical reliability.
[0033] Other embodiments will be listed below for illustration. It must be noted that the following embodiments adopt the component reference numerals and partial content of the aforementioned embodiments, wherein the same reference numerals are used to represent the same or similar components, and the description of the same technical content is omitted. For the description of the omitted parts, reference may be made to the aforementioned embodiments, and the following embodiments will not be repeated redundantly.
[0034] FIG. 2 is a cross-sectional schematic diagram of a substrate structure according to an embodiment of the present invention. Please refer to FIG. 1I and FIG. 2 simultaneously. The substrate structure 100b of this embodiment is similar to the substrate structure 100a of FIG. 1I described above, but the main difference between them is that: in this embodiment, the substrate structure 100b further includes at least one build-up structure layer configured on at least one of the first substrate 110 and the second substrate 120, and electrically connected to at least one of the first conductive via 114 and the second conductive via 124. Furthermore, the substrate structure 100b of this embodiment includes build-up structure layers 130, 140 respectively configured on the lower surface 113 of the first substrate 110 and the lower surface 123 of the second substrate 120, wherein the first substrate 110 and the second substrate 120 are located between the build-up structure layers 130, 140. In one embodiment, the build-up structure layers 130, 140 respectively include dielectric layers 132, 142, circuit layers 134, 144, and conductive blind vias 136, 146, wherein the dielectric layers 132, 142 and the circuit layers 134, 144 are alternately stacked, and the conductive blind vias 136, 146 connect the circuit layers 134, 144. In one embodiment, the circuit layers 134, 144 of the build-up structure layers 130, 140 are respectively electrically connected to the second end 114b of the first conductive via 114 and the second end 124b of the second conductive via 124.
[0035] FIG. 3 is a cross-sectional schematic diagram of a substrate structure according to an embodiment of the present invention. Please refer to FIG. 1I and FIG. 3 simultaneously. The substrate structure 100c of this embodiment is similar to the substrate structure 100a of FIG. 1I described above, but the main difference between them is that: in this embodiment, the material of the first conductive via 114 of the first substrate 110and the material of the second conductive via 124 of the second substrate 120 are respectively conductive paste.
[0036] FIG. 4 is a cross-sectional schematic diagram of a substrate structure according to an embodiment of the present invention. Please refer to FIG. 3 and FIG. 4 simultaneously. The substrate structure 100d of this embodiment is similar to the substrate structure 100c of FIG. 3 described above, but the main difference between them is that: in this embodiment, the substrate structure 100d includes build-up structure layers 130, 140 respectively configured on the lower surface 113 of the first substrate 110 and the lower surface 123 of the second substrate 120, wherein the first substrate 110 and the second substrate 120 are located between the build-up structure layers 130, 140. In one embodiment, the build-up structure layers 130, 140 respectively include dielectric layers 132, 142, circuit layers 134, 144, and conductive blind vias 136, 146, wherein the dielectric layers 132, 142 and the circuit layers 134, 144 are alternately stacked, and the conductive blind vias 136, 146 connect the circuit layers 134, 144. In one embodiment, the circuit layers 134, 144 of the build-up structure layers 130, 140 are respectively electrically connected to the second end 114b of the first conductive via 114 and the second end 124b of the second conductive via 124.
[0037] In summary, in the substrate structure of the present invention, the second bonding layer bonds to the first bonding layer to define the non-metal contact interface, and the second electroless metal block bonds to the first electroless metal block to define the metal bonding contact interface, so that the second substrate bonds to the first substrate, thereby forming the substrate structure having dielectric through hole(s) with high aspect ratio. Compared to the prior art, the present invention does not require additionally adding resin material having conductive paste and/or adopting glass substrate with high thickness, and may have advantages of simple process, cost reduction, and increased production capacity. Furthermore, since the substrate structure of the present invention does not require additionally adding resin material having conductive paste, the electrical continuity between the first conductive via, the first electroless metal block, the second electroless metal block, and the second conductive via enables the substrate structure of the present invention to have better electrical reliability.
[0038] Although the present invention has been disclosed above with embodiments, they are not intended to limit the present invention. Any person having ordinary knowledge in the technical field may make slight modifications and refinements without departing from the spirit and scope of the present invention. Therefore, the protection scope of the present invention shall be defined by the appended claims.
