Nano-structure assembly and nano-device comprising same
09853106 · 2017-12-26
Assignee
Inventors
Cpc classification
H01L23/373
ELECTRICITY
H01L29/78681
ELECTRICITY
H01L29/152
ELECTRICITY
H01L2924/0002
ELECTRICITY
H01L29/786
ELECTRICITY
H01L29/78603
ELECTRICITY
H01L2924/00
ELECTRICITY
H01L2924/0002
ELECTRICITY
F28D15/02
MECHANICAL ENGINEERING; LIGHTING; HEATING; WEAPONS; BLASTING
H01L29/775
ELECTRICITY
H01L29/0676
ELECTRICITY
H01L2924/00
ELECTRICITY
H01L29/7869
ELECTRICITY
H01L29/78696
ELECTRICITY
International classification
H01L29/15
ELECTRICITY
H01L29/775
ELECTRICITY
H01L29/06
ELECTRICITY
F28D15/02
MECHANICAL ENGINEERING; LIGHTING; HEATING; WEAPONS; BLASTING
H01L29/20
ELECTRICITY
Abstract
Provided are a nano-structure assembly including an insulating substrate; and a nano-structure formed on the insulating substrate, and a nano-device including the same.
Claims
1. A nano-structure assembly comprising: an insulating substrate; and a plurality of nano-structures directly disposed on the insulating substrate; and a semiconductor layer covering the plurality of nano-structures, wherein the insulating substrate includes hexagonal boron nitride (h-BN), wherein the plurality of nano-structures includes a semiconductor, wherein the insulating substrate has a thickness in the range of 0.35 nm to 100 nm and a sheet resistance in the range of 1 GΩ/□ or greater, wherein a length of the plurality of nano-structures is larger than the thickness of the plurality of nano-structures, wherein the plurality of nano-structures is embedded in the semiconductor layer.
2. The nano-structure assembly according to claim 1 wherein a ratio of length to diameter of the nano-structure is in a range of 1 to 1000.
3. The nano-structure assembly according to claim 1 wherein the plurality of nano-structures includes at least one selected from the group consisting of nanorods, nanoneedles, nanotubes, nanoflowers and nanowalls disposed on the insulating substrate.
4. The nano-structure assembly according to claim 2 wherein the plurality of nano-structures includes at least one selected from the oxide group comprising ZnO, TiO.sub.2, Al.sub.2O.sub.3, SnO.sub.2, SiO.sub.2, In.sub.2O.sub.3, CdO, MgO, CaO, SrO, BaO, NiO, Cu.sub.2O, and CuO; the nitride group comprising GaN, InGaN, AlGaN; the carbide group comprising SiC; and the III-V group or the II-VI group compounds comprising GaAs, GaP, InP, GaInP and AlGaAs.
5. The nano-structure assembly according to claim 2 comprising a coating layer disposed on a surface of the plurality of nanostructures.
6. The nano-structure assembly according to claim 5, wherein the coating layer includes a plurality of junctions with the nano-structure.
7. The nano-structure assembly according to claim 1 wherein the semiconductor layer includes a composition identical to or different from a composition of the plurality of nanostructures.
8. A nano-device comprising: an insulating substrate; a plurality of nano-structures disposed on one surface of the insulating substrate; a semiconductor layer covering the plurality of nano-structures, a source electrode and a drain electrode, disposed on the semiconductor layer; and a gate electrode disposed on the other surface of the insulating substrate, wherein the insulating substrate includes hexagonal boron nitride (h-BN), wherein the insulating substrate has a thickness in the range of 0.35 nm to 100 nm and a sheet resistance in the range of 1 GΩ/□ or greater, wherein a length of the plurality of nano-structures is larger than the thickness of the plurality of nano-structures, wherein the plurality of nano-structures is embedded in the semiconductor layer.
9. A nano-device comprising: an insulating substrate; a plurality of nano-structures disposed on one surface of the insulating substrate; a semiconductor layer covering the plurality of nano-structures; and a source electrode, a drain electrode and a gate electrode which are disposed on the insulating substrate, wherein a part of the insulating substrate corresponding to the source electrode and the drain electrode is etched, wherein the insulating substrate includes hexagonal boron nitride (h-BN), wherein the insulating substrate has a thickness in the range of 0.35 nm to 100 nm and a sheet resistance in the range of 1 GΩ/□ or greater, wherein a length of the plurality of nano-structures is larger than the thickness of the plurality of nano-structures, wherein the plurality of nano-structures is embedded in the semiconductor layer.
10. The nano-device according to claim 8 wherein the semiconductor layer has a composition identical to or different from a composition of the plurality of nano-structures.
11. The nano-device according to claim 9 wherein the semiconductor layer has a composition identical to or different from a composition of the plurality of nano-structures.
Description
DESCRIPTION OF DRAWINGS
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MODES OF THE INVENTION
(9) Since the present invention may have various modifications and embodiments, some exemplary embodiments are shown in the drawings and will be described in further detail.
(10) It should be understood, however, that there is no intent to limit exemplary embodiments to the particular forms disclosed, but to the contrary, exemplary embodiments are to cover all modifications, equivalents, and alternatives falling within the scope of the present invention.
(11) In the embodiments described below, it is to be understood that the terms “comprise” and/or “have” as used herein specify the presence of stated features, numerals, steps, operations, components, elements or combinations thereof, but do not preclude the presence or addition of one or more other features, numerals, steps, operations, components, elements or combinations thereof.
(12) Also, in the drawings, sizes of elements may be exaggerated or contracted for purposes of clarity and convenience of description.
(13) Some embodiments of the present invention are described below in further detail with reference to the accompanying drawings. Those components that are the same are described using the same reference numeral throughout the drawings, and redundant descriptions thereof may not be repeated.
(14)
(15) As illustrated in
(16) As the insulating substrate 120, among various insulating materials, a substrate composed of boron nitride may be selected.
(17) Boron nitrides can be broadly categorized into two types, hexagonal boron nitride (hBN) and cubic boron nitride (cBN). Of the two, hexagonal boron nitride (h-BN) has a layered structure similar to graphite, and excellent transparency, thermal stability, electrical insulating property, thermal conductivity and heat radiating property. Hereinafter, it will be discussed with a hexagonal boron nitride substrate as the insulating substrate.
(18) The hexagonal boron nitride substrate 120 can be manufactured by being formed on a separate growth substrate 110 and then peeled off. More specifically, the hexagonal boron nitride substrate 120 may be manufactured by flowing a boron (B) source and a nitride (N) source into a chamber in which a nickel (Ni) or copper (Cu) substrate is deposited. Here, a small amount of vapor may be flowed into the chamber to prevent carbon contamination.
(19) Also, the thickness of the hexagonal boron nitride substrate 120 is preferably in the range of 0.35 nm to 100 nm. With the thickness less than 0.35 nm, it is difficult to secure sufficient strength, whereas the thickness greater than 100 nm leads to undesirable opacity in the substrate.
(20) Sheet resistance of the hexagonal boron nitride substrate 120 is preferably 1 GΩ/□ or greater. With the surface resistance below 1 GΩ/□, the hexagonal boron nitride substrate may undesirably act as a channel for leakage current.
(21) The nano-structure 200 grows on the hexagonal boron nitride substrate 120 in practically a vertical direction. These nano-structures 200 can be formed by chemical vapor deposition (CVD) including metalorganic chemical vapor deposition (MOCVD), sputtering, thermal or electron beam evaporation, pulse laser deposition (PLD), or molecular beam epitaxy (MBE).
(22) The nano-structure 200 may include at least one selected from the group consisting of oxides, such as ZnO, TiO.sub.2, Al.sub.2O.sub.3 SnO.sub.2, SiO.sub.2, In.sub.2O.sub.3, CdO, MgO, CaO, SrO, BaO, NiO, Cu.sub.2O, and CuO; nitrides, such as GaN, InGaN, AlGaN; carbides such as SiC; and □-□ and □-□ group compounds such as GaAs, GaP, InP, GaInP or AlGaAs.
(23) Although the nano-structure 200 illustrated in
(24) Also, as illustrated in
(25) The diameter or thickness of the nano-structure 200 may be in the range of 10 nm to 100 um, and the height of the nano-structure 200 may be in the range of 10 nm to 100 um. Also, the ratio of length to diameter of the nano-structure 200 may range from 1 to 1000. However, these figures may vary depending on the type of a nano-structure, the form of a nano-device, and their characteristics.
(26) As illustrated in
(27)
(28) As illustrated in
(29) Alternatively, as shown in
(30) For example, the first coating layer 220 may be manufactured with ZnO (bandgap: 3.27 eV) and the second coating layer may be manufactured with MgO (bandgap: 8 eV) to form a quantum well structure. The coating layers may be formed by methods such as MOCVD and sputtering. Light-emitting diodes (LED) or laser devices may be manufactured using these nanostructures.
(31)
(32) As illustrated in
(33) When the thin film layer 300 has a composition identical to the nano-structure 200, it has an advantage that the formation of the thin film layer 300 is easier. That is, forming the thin film layer 300 directly on the substrate 120 causes a problem that the quality of the thin film layer is lowered. However, as disclosed in the present invention, it is far easier to form the thin film layer 300 on the nano-structure 200 that is already present with a certain height and in a certain density.
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(35) Referring to
(36) Also, referring to
(37) Here, the first thin film layer 300 may be an n-type semiconducting layer and the second thin film layer 310 may be a p-type semiconducting layer. Also, a part of the second thin film layer 310 may be mesa-etched so that the first electrode 410 may be formed on the first thin film layer 300. Here, an active layer (not depicted) may be included between the first thin film layer 310 and the second thin film layer 320 if needed. Nano-devices having such structures described above may be light-emitting diodes (LEDs) or photoelectric conversion devices such as laser.
(38)
(39) As illustrated in
(40) Also, as illustrated in
(41) Here, the hexagonal boron nitride substrate 120 may be etched in a certain pattern so that the source electrode 430 and the drain electrode 440 can be in contact with the nano-structure 200 or/and the thin film layer 300.
(42) Devices with the structures described above can act as a transistor or MOSFET. Here, the thin film layer 300 which is in contact with the source electrode 430 and the drain electrode 440 may be n-type doped. The structures described above are analogous to the structures of FET in general, however, owing to the insulating property of the hexagonal boron nitride substrate 120, a separate insulating layer (dielectric layer) is not required.
(43) However, constitution of these devices is not limited to the above-described, and there are various viable modifications. For example, as illustrated in
(44) While the present invention has been described with reference to exemplary embodiments, it will be understood by those skilled in the art that many modifications and variations can be made without departing from the scope of the appended claims and the spirit of the present invention.
DESCRIPTION OF SYMBOLS
(45) 120: hexagonal boron nitride substrate 200: nano-structure 300: thin film layer