Electronic Package and Electronic Device Comprising the Same

Abstract

Example embodiments relate to electronic packages and electronic devices that include the same. One embodiment includes an electronic package. The electronic package includes a package body. The electronic package also includes a heat-conducting substrate arranged inside the package body and having a bottom surface that is exposed to an outside of the package body. Additionally, the electronic package includes an electronic circuit arranged inside the package body and including a semiconductor die that has a bottom surface with which it is mounted to the heat-conducting substrate and an opposing upper surface. Further, the electronic package includes one or more leads partially extending from outside the package body to inside the package body and over the minimum bounding box, each lead having a first end that is arranged inside the package body. In addition, the electronic package includes one or more bondwires for connecting the first end(s) to the electronic circuit.

Claims

1-15. (canceled)

16. An electronic package comprising: a package body; a heat-conducting substrate arranged inside the package body and having a bottom surface that is exposed to an outside of the package body, the heat-conducting substrate having associated therewith a minimum bounding box that surrounds the heat-conducting substrate; an electronic circuit arranged inside the package body and comprising a semiconductor die that has a bottom surface with which it is mounted to the heat-conducting substrate and an opposing upper surface; one or more leads partially extending from outside the package body to inside the package body and over the minimum bounding box, each lead having a first end that is arranged inside the package body; and one or more bondwires for connecting the first end(s) to the electronic circuit, wherein the heat-conducting substrate comprises one or more recesses or cut-outs underneath the one or more leads, wherein upper surface(s) of the first end(s) of the one or more leads substantially lie in a plane with the upper surface of the semiconductor die, said plane being parallel to the bottom surface of the heat-conducting substrate, wherein the one or more leads were parts of a lead frame that was used for the manufacturing of the electronic package, wherein prior to separating the electronic package, the one or more leads and the heat-conducting substrate were connected to a remainder of the lead frame, wherein said separating comprises breaking the connection between the one or more leads and the remainder of the lead frame and between the heat-conducting substrate and the remainder of the lead frame, wherein the electronic package comprises tie bar remnants connected at corners of the heat-conducting substrate, wherein prior to separating the electronic package, the heat-conducting substrate was connected to the remainder of the lead frame using the tie bars, wherein some or all of the one or more leads enter the package body at a height position relative to the bottom surface of the heat-conducting substrate that is greater than a height position of the first end(s) of those leads relative to the bottom surface of the heat-conducting substrate, and wherein each lead among said some or all of the one or more leads comprises: a first lead part that extends at least partially outside the package body and substantially parallel to the bottom surface of the heat-conducting substrate; a second lead part that extends inside the package body and substantially parallel to the bottom surface of the heat-conducting substrate; and a curved lead part that extends at least partially inside the package body and that connects the first and second lead parts.

17. The electronic package according to claim 16, wherein a difference in vertical offset relative to the bottom surface of the heat-conducting substrate of the upper surface(s) of the first end(s) of the one or more leads and the upper surface of the semiconductor die is less than 50 micrometers.

18. The electronic package according to claim 16, wherein the one or more leads comprise one or more input leads, and wherein the electronic circuit comprises an input that is connected to the first end(s) of the one or more input leads.

19. The electronic package according to claim 18, wherein the one or more recesses or cut-outs for the one or more input leads are formed as a plurality of spaced apart recesses or cut-outs arranged at a first side of the heat-conducting substrate.

20. The electronic package according to claim 18, wherein the one or more recesses or cut-outs for the one or more input leads are formed as a single continuous recess or cut-out arranged at a first side of the heat-conducting substrate.

21. The electronic package according to claim 20, wherein the one or more recesses or cut-outs for the one or more input leads comprise a continuous recess extending along an entire perimeter of the heat-conducting substrate.

22. The electronic package according to claim 16, wherein the one or more leads comprise one or more output leads, and wherein the electronic circuit comprises an output that is connected to the first end(s) of the one or more output leads.

23. The electronic package according to claim 22, wherein the one or more recesses or cut-outs for the one or more output leads are formed as a plurality of spaced apart recesses or cut-outs arranged at a second side of the heat-conducting substrate.

24. The electronic package according to claim 23, wherein the one or more recesses or cut-outs for the one or more output leads are formed as a single continuous recess or cut-out arranged at a second side of the heat-conducting substrate, and wherein the one or more recesses or cut-outs for the one or more output leads comprise a continuous recess extending along an entire perimeter of the heat-conducting substrate.

25. The electronic package according to claim 16, wherein each lead among the one or more leads is associated with a different recess or cut-out among the one or more recesses or cut-outs.

26. The electronic package according to claim 16, wherein the electronic circuit comprises one or more transistors integrated in the semiconductor die at or near the upper surface, wherein the bottom surface is physically connected to the heat-conducting substrate, wherein the electronic circuit is an RF amplifying circuit, wherein the one or more transistors comprise one or more RF power transistors, and wherein the one or more transistors comprise a Silicon-based laterally diffused metal-oxide-semiconductor (LDMOS) transistor or a Gallium Nitride-based field-effect transistor (FET).

27. The electronic package according to claim 26, wherein the semiconductor die comprises a conductive substrate for allowing the one or more transistors to be grounded through the conductive substrate and heat-conducting substrate, or wherein the semiconductor die comprises a substrate in which one or more vias are arranged for allowing the one or more transistors to be grounded through the one or more vias and heat-conducting substrate.

28. The electronic package according claim 16, wherein a thickness of the one or more leads is greater than a thickness of the semiconductor die, wherein a thickness of the one or more leads lies in the range between 0.1 and 0.4 mm, and wherein a thickness of the semiconductor lies in the range between 50 and 200 micrometers.

29. The electronic package according to claim 16, wherein the package body comprises an air cavity in which the semiconductor die and the first end(s) of the one or more leads are arranged.

30. The electronic package according to claim 29, further comprising a spacer element for ensuring that the one or more leads and the heat-conducting substrate are spaced apart.

31. The electronic package according to claim 30, wherein the spacer element comprises a ceramic ring or a thermoplastic ring or wherein the spacer element is formed by a solidified molding compound through which the one or more leads extend.

32. The electronic package according to claim 31, further comprising a package lid connected to the spacer element and delimiting the air cavity.

33. The electronic package according to claim 16, wherein the package body is formed by a solidified molding compound that fills the inside of the package body and that contacts the semiconductor die and the one or more leads.

34. An electronic device, comprising: the electronic package according to claim 16, wherein the one or more leads each have a mounting end opposite from the first end; and a printed circuit board comprising: a ground pad that is electrically and physically connected to the heat-conducting substrate; and one or more signal pads that are electrically and physically connected to the mounting end(s) of the one or more leads.

35. The electronic device according to claim 34, wherein: the printed circuit board comprises multiple layers, wherein: the ground pad is formed at an inner layer and the signal pads are formed at an outer layer; or the ground pad has been exposed to an outside by removal of the layer(s) above the ground pad; or the ground pad is formed by a top surface of a coin that is integrated in the printed circuit board.

Description

[0028] Next, the present invention will be described with reference to the appended drawings, wherein:

[0029] FIGS. 1A and 1B illustrate a cross sectional view and a top view, respectively, of a known electronic package;

[0030] FIGS. 2A and 2B illustrate a cross-sectional view of an embodiment of an electronic package according to the present invention using a recess in the heat-conducting substrate for a lead having a downset, and a straight lead, respectively;

[0031] FIGS. 3A and 3B are perspective views corresponding to the embodiments of FIGS. 2A and 2B, respectively;

[0032] FIGS. 4A and 4B present perspective views of an embodiment of an electronic package according to the present invention in which the heat-conducting substrate is provided with a cut-out and in which straight leads and leads with a downset are used;

[0033] FIG. 5A illustrates a cross-sectional view of an embodiment of an electronic package in accordance with the present invention in which an air cavity is used and FIG. 5B illustrates an embodiment of an electronic device in accordance with the present invention in which the electronic package of FIG. 5A is used; and

[0034] FIG. 6A illustrates a cross-sectional view of a further embodiment of an electronic package in accordance with the present invention in which the package body is filled with solidified molding compound and FIG. 6B illustrates a further embodiment of an electronic device in accordance with the present invention in which the electronic package of FIG. 6B is used.

[0035] FIGS. 2A and 2B illustrate a cross-sectional view of an embodiment of an electronic package in accordance with the present invention using a recess 1B in heat-conducting substrate 1 for a lead 4 having a downset 4C, and a straight lead 4, respectively. As illustrated in FIG. 2A, lead 4 comprises a first lead part 4B, a second lead part 4D, and a downset 4C connecting lead parts 4B, 4D.

[0036] Lead part 4B extends at least partially outside the package body (not shown). As shown, downset 4C allows a height position h1 at which lead 4 enters the package body to be greater than a height position h2 of first end 4A relative to the bottom surface of heat-conducting substrate 1.

[0037] On the other hand, lead 4 in FIG. 2B is a straight lead. For this package, the package stand-off height, denoted by h1, is lower than that of the package in FIG. 2A. As will be explained later, the package stand-off height is important for packages that are partially arranged in a recess of a printed circuit board.

[0038] FIGS. 3A and 3B are perspective views corresponding to the embodiments of FIGS. 2A and 2B, respectively. Here, a layer 2A, e.g. solder layer, is shown for mounting semiconductor die 2 on heat-conducting substrate 1. Furthermore, FIG. 3A illustrates a part of a smallest rectangle E1 that surrounds heat-conducting substrate 1 and that is parallel to bottom surface 1A of heat-conducting substrate 1. A similar rectangle is shown in connection with FIG. 4B. In both cases, leads 4 partially extend partially over smallest rectangle E1.

[0039] FIGS. 4A and 4B present perspective views of an embodiment of an electronic package in accordance with the present invention in which heat-conducting substrate 1 is provided with a cut-out 1C and in which straight leads 4 and leads 4 with a downset 4C are used.

[0040] FIG. 4B illustrates a smallest rectangle E1 that surrounds heat-conducting substrate 1. Rectangle E1 is parallel to a bottom surface 1A of heat-conducting substrate 1. The end section of each lead, e.g. lead part 4D, extends over rectangle E1. In this region, a cut-out 1C is used to avoid electrical contact between leads 4 and heat-conducting substrate 1.

[0041] The embodiment shown in FIG. 4B may relate to a Doherty amplifier, wherein the main and optionally one or more of the peak amplifiers are arranged on a first semiconductor die 2, whereas the other peak amplifiers are arranged on the other semiconductor die 2′. Furthermore, leads 4 at the output, i.e. the side on the right in FIG. 4B, are much wider than leads 4 at the input to allow large currents to flow.

[0042] As shown in FIG. 4B, a cut-out 1C may be provided on opposite sides of the package. However, the present invention is not limited to such configuration. For example, a cut-out or recess may be provided on only one side. Alternatively, a cut-out may be provided on one side whereas a recess is provided on the other side.

[0043] FIGS. 4A and 4B also illustrate remnants 6 of a tie bar by which heat-conducting substrate 1 was connected at the time of simultaneously forming a plurality of packages. Each tie bar was and is connected to heat-conducting substrate 1 using a rivet 6A.

[0044] FIG. 5A illustrates a cross-sectional view of an embodiment of an electronic package 10 in accordance with the present invention in which an air cavity is used, and FIG. 5B illustrates an embodiment of an electronic device 40 in accordance with the present invention in which the electronic package of FIG. 5A is used.

[0045] Package 10 shown in FIG. 5A comprises an air cavity 7. It further comprises input and output leads 4, a heat-conducting substrate 1, and a semiconductor die 2. Heat-conducting substrate 1 is kept spaced apart from leads 4 by means of a solidified molding compound 8. Package 10 further comprises a package lid 11 that is connected to solidified molding compound 8. Solidified molding compound 8, heat-conductive substrate 1, and package lid 11 together define the outside surface of package body 3.

[0046] Package 10 comprises straight input and output leads 4. As illustrated, leads 4 comprise a first lead part 4B that mainly extends outside of package body 3, a downset 4C that is arranged inside package body 3, and a second lead part 4D of which an end 4A is exposed inside air cavity 7. This allows bondwires 5 to connect between leads 4 and the circuitry on semiconductor die 2. As shown, end 4A of lead 4 lies substantially in plane with the top surface of semiconductor die 2. Consequently, bondwires 5 between end 4A and the circuitry on semiconductor die 2 can be arranged with a very low profile. Such profile results in a low self-inductance of bondwire 5 and reduces the susceptibility for electromagnetic coupling with other bondwires in package 10.

[0047] In FIG. 5B, package 10 is mounted on a printed circuit board, ‘PCB’, 20 that comprises two dielectric layers. A first dielectric layer 21 forms the bottom part of PCB 20 and a second dielectric layer 22 forms the top part of PCB 20. On and in between layers 21, 22, metal layers are available. For example, a first metal layer 23 is arranged on dielectric layer 21, a second metal layer 24 is arranged in between dielectric layers 21, 22, and a third metal layer 25 is arranged on second dielectric layer 22. It should be clear to the skilled person that the invention is not limited to these dielectric layers and metal layers and that other PCBs would be equally possible with more or less metal layers and dielectric layers.

[0048] PCB 20 is provided with a coin 26 that is made of material having a high coefficient of thermal conductivity, e.g. Copper. Coin 26 is provided inside a cavity inside first dielectric layer 21. A further cavity is provided inside second dielectric layer 22, in which cavity package 10 is arranged.

[0049] The backside of package 10 is formed by the exposed part of heat-conducting substrate 1. This substrate is connected, e.g. by means of soldering, to coin 26 that defines a ground pad. At the same time, leads 4 connect to signal pads formed in third metal layer 25. As shown in FIG. 5B, the package stand-off height typically corresponds to the combined thickness of second dielectric layer 22 and third metal layer 25. However, due to the use of downset 4C, end 4A of lead 4 can be arranged to be in plane with the top surface of semiconductor die 2.

[0050] FIG. 6A illustrates a cross-sectional view of a further embodiment of an electronic package 30 in accordance with the invention. On the other hand, FIG. 6B illustrates an electronic device 50 comprising electronic package 30. Compared to package 10 in FIG. 5A, package 30 is fully filled with solidified molding compound 8. To manufacture such package, semiconductor die 2 has to be mounted to heat-conducting substrate 1 prior to applying the molding compound. Bondwires 5 also have to be arranged to connect leads 4 to the circuitry on semiconductor die 2 before applying the molding compound.

[0051] In FIG. 6A, leads 4 have a different, non-straight, shape. More in particular, leads 4, and more in particular, first lead parts 4B, have a curved shape that brings an end of leads 4 to roughly the same level as a bottom surface of package 30. This shape allows package 30 to be mounted on a PCB 20 as shown in FIG. 6B. PCB 20 can be configured identical to PCB 20 of FIG. 5B with the exception that coin 26 completely extends through PCB 20 by means of corresponding cavities in first and second dielectric layers 21, 22. In this manner, all connections between electronic package 30 and PCB 20 are realized on the level of third metal layer 25.

[0052] PCB 20 in FIG. 6B also comprises signals pads to which bondwires 5 are connected. The thermal connection between heat-conducting substrate 1 and coin 26 is ensured by mounting heat-conducting substrate 1 on coin 26, which acts as a ground pad, optionally via one or more mounting layers.

[0053] As shown in FIG. 6A, end 4A and the top surface of semiconductor die 2 lie in a plane that is parallel to a bottom surface of heat-conducting substrate 1.

[0054] In the above, the present invention has been explained using detailed embodiments thereof. However, it should be appreciated that the invention is not limited to these embodiments and that various modifications are possible without deviating from the scope of the present invention, which is defined by the appended claims.

LIST OF REFERENCE SIGNS

[0055] E1 Smallest quadrangle [0056] E2 Overlap lead and smallest quadrangle [0057] 1. Heat-conducting substrate [0058] 1A. Bottom surface heat-conducting substrate [0059] 1B. Recess [0060] 1C. Cut-out [0061] 2, 2′. Semiconductor substrate [0062] 2A. Solder layer [0063] 3. Package body [0064] 4A. First end of lead [0065] 4B. First lead part [0066] 4C. Downset [0067] 4D. Second lead part [0068] 5. Bondwire [0069] 6. Tie bar remnant [0070] 6A. Rivet [0071] 7. Air cavity [0072] 8. Solidified molding compound [0073] 10. Electronic package [0074] 11. Package lid [0075] 20. PCB [0076] 21. First dielectric layer [0077] 22. Second dielectric layer [0078] 23. First metal layer [0079] 24. Second metal layer [0080] 25. Third metal layer [0081] 26. Coin [0082] 30. Electronic package [0083] 40. Electronic device [0084] 50. Electronic device