Provided is a package structure includes a first die, a first dielectric layer, a second dielectric layer and a carrier. The first dielectric layer covers a bottom surface of the first die. The first dielectric layer includes a first edge portion and a first center portion in contact with the bottom surface of the first die. The second dielectric layer is disposed on the first dielectric layer and laterally surrounding the first die. The second dielectric layer includes a second edge portion and a second center portion. The second edge portion is located on the first edge portion, and the second edge portion is thinner than the second center portion. The carrier is bonded to the first dielectric layer through a bonding film.

The disclosure provides an electronic device and a manufacturing method thereof. The electronic device includes a substrate, an electronic element, an underfill layer, and a protective structure. The electronic element is disposed on the substrate. At least a portion of the underfill layer is disposed between the substrate and the electronic element. A thickness of the underfill layer is not greater than a height from a surface of the substrate to an upper surface of the electronic element. The protective structure is disposed on the substrate and adjacent to the underfill layer. The electronic device and the manufacturing method thereof of the disclosure may effectively control an area of the underfill layer.

A Non Conductive Film (NCF) at least includes a first film layer and a second film layer. A surface of the first film layer is provided with a grid-shaped groove structure, and a depth of each groove of the groove structure is less than a thickness of the first film layer. The second film layer is located in the groove in the surface of the first film layer. The fluidity of the first film layer is greater than the fluidity of the second film layer under the same condition.

The present invention includes: a position detection unit (55) detecting positions of semiconductor chips and storing each detected position in a position database (56); a position correction unit (57) outputting a corrected bonding position; and a bonding control unit (58) performing bonding of the semiconductor chips based on the corrected bonding position input from the position correction unit (57). The position correction unit (57) calculates position shift amounts between the semiconductor chips of respective stages and an accumulated position shift amount, and when the accumulated position shift amount is greater than or equal to a predetermined threshold value, corrects the position of the semiconductor chip by the accumulated position shift amount and outputs it as the corrected bonding position, and the bonding control unit (58) performs bonding of the semiconductor chip of the next stage at the corrected bonding position input from the position correction unit.

A semiconductor device (1) according to the present disclosure includes a semiconductor chip (2), an interposer substrate (3), and a die-bonding material (4) formed in a partially opened annular shape in a plan view. The semiconductor chip (2) includes a region in which an integration density of an electronic circuit is high (23, 24, and 25) and a region in which the integration density is low (22). The semiconductor chip (2) is implemented on the interposer substrate (3). The die-bonding material (4) formed in a partially opened annular shape in a plan view is provided between the region in which the integration density is high (23, 24, and 25) in the semiconductor chip (2) and the interposer substrate (3).

A heat dissipation structure is provided and includes a heat dissipation body and an adjustment channel. A carrying area and an active area adjacent to the carrying area are defined on a surface of the heat dissipation body, the carrying area is used for applying a first heat dissipation material thereonto, and the adjustment channel is formed in the active area, where one end of the adjustment channel communicates with the outside of the heat dissipation structure, and the other end communicates with the carrying area. Therefore, when the heat dissipation body is coupled to the electronic component by the first heat dissipation material, the adjustment channel can adjust a volume of the first heat dissipation material.

An IC die includes a temperature control element suitable for three-dimensional IC package with enhanced thermal control and management. The temperature control element may assist temperature control of the IC die when in operation. In one example, the temperature control element may have a plurality of thermal dissipating features disposed on a first surface of the IC die to efficiently control and dissipate the thermal energy from the IC die when in operation. A second surface opposite to the first surface of the IC die may include a plurality of devices, such as semiconductors transistors, devices, electrical components, circuits, or the like, that may generate thermal energy when in operation. The temperature control element may provide an IC die with high efficiency of heat dissipation that is suitable for 3D IC package structures and requirements.

A chip bonding apparatus, includes: a body; a substrate conveyor installed on the body to transfer a substrate; a bonding head conveyor disposed on an upper surface of the body; an alignment unit installed on the body and adjusting a position of the substrate and a position of a chip; and a bonding head installed in the bonding head conveyor and moved and attaching a chip therebelow, wherein the bonding head is provided with a chip bonding unit for attaching the chip in a lower end portion thereof, wherein the chip bonding unit, includes: a chip bonding unit body having an installation groove formed therein; a pushing module having one end portion inserted in the installation groove; and an attachment module having a deformable member deformed by the pushing module; wherein the deformable member is provided with a deformable portion which is deformed by being pressed by the pushing module, and having a bottom surface in contact and exerting a force on the chip to bond the chip to the substrate.

A system includes a package layer with microchannels to spread heat localized in the package at an electronic die. The microchannel is integrated onto or into the package layer. The microchannel has a hollow heat conducting material through which a fluid is to flow to spread the heat. The microchannel has a triangular cross-section or a trapezoidal cross-section. The microchannel can be sealed in the integration process to result in a closed heat pipe structure in which liquid flows through expansion and compression in response to heating and cooling, respectively.

This mounting apparatus is provided with: a plurality of bonding stations each comprising a bonding apparatus for bonding a semiconductor chip onto a substrate wafer, and a chip supply apparatus for supplying the semiconductor chip to the bonding apparatus; and a single wafer transfer apparatus which transfers the substrate wafer in order to supply the substrate wafer to each of the plurality of bonding stations and to collect the substrate wafer from each of the plurality of bonding stations.