Non-insulated power module
11264312 ยท 2022-03-01
Assignee
Inventors
Cpc classification
H01L25/18
ELECTRICITY
H01L23/36
ELECTRICITY
H01L2224/48472
ELECTRICITY
H01L2924/00012
ELECTRICITY
H01L2924/00014
ELECTRICITY
H01L2224/48139
ELECTRICITY
H01L2924/00014
ELECTRICITY
H01L2224/48137
ELECTRICITY
H01L2224/4903
ELECTRICITY
H01L2924/00012
ELECTRICITY
International classification
H01L25/18
ELECTRICITY
H01L25/07
ELECTRICITY
Abstract
An object of the present invention is to achieve both securing an insulation distance and securing a chip mounting area in a non-insulated power module. A non-insulated power module includes a plurality of die pads, a plurality of semiconductor chips mounted on upper surfaces of the plurality of die pads, and a package sealing the semiconductor chips, in which lower surfaces of the plurality of die pads are exposed from a lower surface of the package, on the lower surface of the package, first grooves are formed in areas between the plurality of die pads, and the plurality of die pads have a trapezoidal cross-sectional shape in the thickness direction, in which an area of an upper surface is larger than an area of the lower surface.
Claims
1. A non-insulated power module comprising: a plurality of die pads arranged along a first direction; a plurality of semiconductor chips mounted on upper surfaces of the plurality of die pads; and a package sealing the plurality of semiconductor chips, wherein lower surfaces of the plurality of die pads are exposed from a lower surface of the package, on the lower surface of the package, first grooves are formed to extend in one direction parallel to the lower surfaces of die pads in areas between the plurality of die pads, and the plurality of die pads have a trapezoidal cross-sectional shape in a thickness direction only when viewed from the first direction, in which an area of an upper surface is larger than an area of the lower surface.
2. The non-insulated power module according to claim 1, wherein on the lower surface of the package, a second groove is formed in a region surrounding the plurality of die pads.
3. The non-insulated power module according to claim 2, wherein a screw hole extending through the package in a thickness direction and provided on an outer peripheral side from the second groove of the package is formed, the screw hole being for attaching heat radiation fins to the package.
4. The non-insulated power module according to claim 3, wherein the heat radiation fins are attached to the lower surface of the package via an insulating member.
5. The non-insulated power module according to claim 2, wherein heat radiation fins are attached to the lower surface of the package via an insulating member.
6. The non-insulated power module according to claim 1, wherein heat radiation fins are attached to the lower surface of the package via an insulating member.
7. The non-insulated power module according to claim 1, wherein one first groove is between each pair of die pads of the plurality of die pads.
8. The non-insulated power module according to claim 1, wherein the one direction parallel to the lower surfaces of die pads is perpendicular to the first direction.
Description
BRIEF DESCRIPTION OF THE DRAWINGS
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DESCRIPTION OF THE PREFERRED EMBODIMENTS
A. Embodiment 1
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(14) The non-insulated power module 101 includes leads 1, 2, die pads 3, Insulated Gate Bipolar Transistor (IGBT) chips 4, Free Wheeling Diode (FWD) chips 5, a control Integrated Circuit (IC) 9, input wires 6, inter-chip wires 7, output wires 8, and a package 10.
(15) Of the lead frame, the portions protruding from the side surface of the package 10 and functioning as external connection terminals are the leads 1 and 2, and the portion on which the semiconductor chip is mounted is the die pad 3. The lead frame is a metal thin plate processed into a wiring shape.
(16) The die pad 3 has the IGBT chip 4 and the FWD chip 5 mounted on its upper surface 31. The upper surface 31 of the die pad 3 is also referred to as a chip mounting surface. As illustrated in
(17) The semiconductor chips and the lead frames are connected by conductive wires. The control IC 9 and the IGBT chip 4 are connected by the input wire 6. The IGBT chip 4 and the FWD chip 5 are connected by the inter-chip wire 7. The FWD chip 5 and the lead 2 are connected by the output wire 8. The die pad 3 also serves as an external connection terminal of the collector electrode of the IGBT chip 4. The emitter electrode of the IGBT chip 4 is connected to the lead 2 by the inter-chip wire 7 and the output wire 8. The IGBT chips 4 mounted on each die pad 3 perform switching at different timings; therefore, a high potential difference of several hundred to one thousand and several hundred volts is generated between the die pads 3.
(18) The IGBT chip 4, the FWD chip 5, the control IC 9, the input wire 6, the inter-chip wire 7, and the output wire 8 are sealed in the package 10. The package 10 is formed by curing the scaling resin. A lower surface 32 of the die pad 3 is exposed from a lower surface 11 of the package 10. On the lower surface 11 of the package 10, grooves 12 are formed in the areas between the die pads 3. The groove 12 is also referred to as a first groove.
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(20) As illustrated in
(21) Note that, in
(22) The non-insulated power module 101 of Embodiment 1 includes a plurality of die pads 3, a plurality of semiconductor chips mounted on the upper surfaces 31 of the plurality of die pads 3, and the package 10 that seals the semiconductor chips. The lower surfaces 32 of the plurality of die pads 3 are exposed from a lower surface 11 of the package 10. On the lower surface 11 of the package 10, the grooves 12 are formed in the areas between the plurality of die pads 3. Hereby, the insulation distance is secured with the entrance of the insulating member 16 into the grooves 12 when the heat radiation fins 15 are attached to the non-insulated power module 101; therefore, the dielectric tolerance between the die pads 3 is improved. Further, the plurality of die pads 3 have a trapezoidal cross-sectional shape in the thickness direction, and the area of the upper surface 31 is larger than the area of the lower surface 32; therefore, the reduction in the area of the upper surface 31, that is, the chip mounting surface due to providing the grooves 12 on the lower surface 11 of the package 10 is suppressed.
B. Embodiment 2
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(24) The non-insulated power module 102 has a groove 13 in addition to the grooves 12 formed on the lower surface 11 of the package 10, and the configuration other than this configuration is the same as that of the non-insulated power module 101 of Embodiment 1. The groove 13 is also referred to as a second groove. The groove 13 is formed on the lower surface 11 of the package 10 in a region surrounding the lower surfaces 32 of all the die pads 3.
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C. Embodiment 3
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(27) In the non-insulated power module 103, screw holes 14 extending through the package 10 in a thickness direction are provided on the outer peripheral side from the groove 13 of the package 10, and the configuration other than this configuration is the same as that of the non-insulated power module 102 of Embodiment 2. In other words, the grooves 12 and the groove 13 are provided on the inner side of the package 10 than the screw holes 14. The screw holes 14 are for attaching the heat radiation fins 15 to the package 10.
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(29) It should be noted that Embodiments of the present invention can be arbitrarily combined and can be appropriately modified or omitted without departing from the scope of the invention.
(30) While the invention has been shown and described in detail, the foregoing description is in all aspects illustrative and not restrictive. It is therefore understood that numerous modifications and variations can be devised without departing from the scope of the invention.