Multi-level inverters using sequenced drive of double-base bidirectional bipolar transistors

Abstract

Power is inverted using double-base-contact bidirectional bipolar transistors in a three-level-inverter topology. The transistors not only switch to synthesize a PWM approximation of the desired AC waveform, but also have transient phases of diode conduction before each full turn-on or turn-off.

Claims

1. A method of inverting power, comprising the actions of: a) providing a neutral line, and hot lines which are respectively positive and negative with reference to the neutral line; and b) operating bidirectional dual-base-contact transistors to selectably connect each output line to the neutral line or to one of the hot lines, to thereby synthesize an AC waveform on each output line; wherein step b operates the transistors as diodes before full turn-on and before full turn-off, and also flows base current, at full turn-on, to lower the voltage drop across each said transistor.

2. The method of claim 1, wherein the providing step generates the neutral line from two of the hot lines.

3. The method of claim 1, wherein step b, for each of the transistors operated thereby, flows base current, at turn-on, through a base contact which is nearest whichever side of the respective transistor is instantaneously operating as a collector, as determined by an external voltage polarity.

4. The method of claim 1, wherein each of the transistors is npn.

5. The method of claim 1, wherein each of the transistors is built in silicon carbide.

6. The method of claim 1, wherein each of the transistors is a three-layer four-terminal device.

7. A power inverter, comprising: a neutral line, and hot lines which are respectively positive and negative with reference to the neutral line; a plurality of output lines, and a plurality of bidirectional dual-base-contact transistors each connected between one of the output lines and one of the neutral and hot lines; and control circuitry which operates the transistors to selectably connect each output line to the neutral line or to one of the hot lines at various times, to thereby synthesize an AC waveform on each output line.

8. The inverter of claim 7, wherein the neutral line is generated from two of the hot lines.

9. The inverter of claim 7, wherein each of the transistors is npn.

10. The inverter of claim 7, wherein each of the transistors is built in silicon carbide.

11. The inverter of claim 7, wherein each of the transistors is a three-layer four-terminal device.

12. A power inverter which operates from positive, negative, and neutral lines, comprising: a plurality of output lines, and a plurality of bidirectional dual-base-contact bipolar transistors each connected between one of the output lines and one of the positive, negative, and neutral lines; and control circuitry which operates the transistors to selectably connect each output line, at chosen times, to one of the positive, negative, and neutral lines, to thereby synthesize an AC waveform on each output line.

13. The inverter of claim 12, wherein the neutral line is generated by averaging the positive and negative lines.

14. The inverter of claim 12, wherein each of the transistors is npn.

15. The inverter of claim 12, wherein each of the transistors is built in silicon carbide.

16. The inverter of claim 12, wherein each of the transistors is a three-layer four-terminal device.

Description

BRIEF DESCRIPTION OF THE DRAWINGS

(1) The disclosed inventions will be described with reference to the accompanying drawings, which show important sample embodiments and which are incorporated in the specification hereof by reference, wherein:

(2) FIG. 1 schematically shows an example of a three-level-inverter which includes various disclosed innovative features.

(3) FIG. 2A shows a conventional three-phase three-level inverter using four IGBTs on each phase leg.

(4) FIG. 2B shows another conventional soft-switched three-level inverter, with snubber circuit highlighted.

(5) FIG. 2C shows one phase leg of the inverter of FIG. 2A.

(6) FIG. 2D shows the phase leg output voltage, and FIG. 2E shows the phase-to-phase output voltage, for one example of PWM operation of the inverter of FIG. 2A.

(7) FIGS. 3A-3F show an example of operation of the BTRAN structure of FIG. 4.

(8) An example of a B-TRAN structure is generally illustrated in FIG. 4.

DETAILED DESCRIPTION OF SAMPLE EMBODIMENTS

(9) The numerous innovative teachings of the present application will be described with particular reference to presently preferred embodiments (by way of example, and not of limitation). The present application describes several inventions, and none of the statements below should be taken as limiting the claims generally.

(10) FIG. 1 schematically shows a new three-level inverter. Capacitor ladder 108 generates a neutral voltage from + and − DC input lines 102 and 104, respectively. (In some cases, such as with bipolar solar array outputs, a neutral voltage may already be present.)

(11) The addition of neutral line 106 provides three input lines. Each of output lines T1, T2, and T3 is connected, through one respective bidirectional device (Q1+, Q10, Q1−, Q2+, Q20, Q2−, Q3+, Q30, and Q3−) to one of input lines 102, 106, and 104. Nine bidirectional devices are thus required (in this example), and that is enough.

(12) By operating the BTRAN transistors according to conventional PWM or related methods, an AC waveform with required characteristics can be synthesized. However, the sequence used in each individual switch transition (OFF to ON or ON to OFF) is not at all conventional, in at least the following ways: 1) Before a BTRAN switch is turned fully on, it is allowed to flow current as a diode. 2) After the switch is passing current as a diode, drive is applied to the base terminal on the collector side of the device. This brings the voltage drop down to much less than a half Volt (typically a very few tenths of a Volt). 3) At turnoff, base drive is removed, but the transistor still passes current as a diode. It is only after some duration of diode conduction that the device is allowed to return to its fully blocking state. 4) Optionally, at turnoff, a brief period of reversed base drive can be performed, to reduce carrier density and thus achieve a net acceleration of turnoff.

(13) Each of the bidirectional devices is preferably a three-layer four-terminal device. Preferably these are symmetrically-bidirectional double-base bipolar transistors, with separate base contacts on the opposite surface, as shown in FIG. 4.

(14) Applications

(15) The disclosed circuit works particularly well with DC inputs which include more than one voltage level. For example, many photovoltaic power arrays provide outputs of +600V and −600V.

(16) Advantages

(17) The disclosed innovations, in various embodiments, provide one or more of at least the following advantages. However, not all of these advantages result from every one of the innovations disclosed, and this list of advantages does not limit the various claimed inventions. Improved efficiency in hard switching; Higher operating voltage; Robustness; Lower device count.

(18) According to some but not necessarily all embodiments, there is provided: A method of inverting power, comprising the actions of: a) providing a neutral line, and hot lines which are respectively positive and negative with reference to the neutral line; b) operating bidirectional dual-base-contact transistors to selectably connect each output line to the neutral line or to one of the hot lines, to thereby synthesize an AC waveform on each output line; wherein step b operates the transistors as diodes before full turn-on and before full turn-off, and also flows base current, at full turn-on, to lower the voltage on each said transistor.

(19) According to some but not necessarily all embodiments, there is provided: A power inverter, comprising: a neutral line, and hot lines which are respectively positive and negative with reference to the neutral line; a plurality of output lines, and a plurality of bidirectional dual-base-contact transistors each connected between one of the output lines and one of the neutral and hot lines; and control circuitry which operates the transistors to selectably connect each output line to the neutral line or to one of the hot lines at various times, to thereby synthesize an AC waveform on each output line.

(20) According to some but not necessarily all embodiments, there is provided: A power inverter which operates from positive, negative, and neutral lines, comprising: a plurality of output lines, and a plurality of bidirectional dual-base-contact bipolar transistors each connected between one of the output lines and one of the positive, negative, and neutral lines; control circuitry which operates the transistors to selectably connect each output line, at chosen times, to one of the positive, negative, and neutral lines, to thereby synthesize an AC waveform on each output line.

(21) According to some but not necessarily all embodiments, there is provided: A method of inverting power from positive, negative, and neutral input lines, comprising the actions of: a) operating bidirectional dual-base-contact transistors to selectably connect each output line to one of the input lines, to thereby synthesize an AC waveform on each output line; b) wherein step a operates the transistors as diodes before full turn-on and before full turn-off, and also flows base current, at full turn-on, to lower the voltage on each said transistor.

(22) According to some but not necessarily all embodiments, there is provided a subsystem wherein: Power is inverted using double-base-contact bidirectional bipolar transistors in a three-level-inverter topology. The transistors not only switch to synthesize a PWM approximation of the desired AC waveform, but also have transient phases of diode conduction before each full turn-on or turn-off.

(23) Modifications and Variations

(24) As will be recognized by those skilled in the art, the innovative concepts described in the present application can be modified and varied over a tremendous range of applications, and accordingly the scope of patented subject matter is not limited by any of the specific exemplary teachings given. It is intended to embrace all such alternatives, modifications and variations that fall within the spirit and broad scope of the appended claims.

(25) Many variations of the basic BTRAN structure have been disclosed by the present inventor. See e.g. U.S. Pat. No. 9,029,909, U.S. Pat. No. 9,035,350, U.S. Pat. No. 9,054,706, U.S. Pat. No. 9,059,710, U.S. Pat. No. 9,054,707, U.S. Pat. No. 9,209,798, U.S. Pat. No. 9,190,894, U.S. Pat. No. 9,209,713, U.S. Pat. No. 9,203,400, U.S. Pat. No. 9,203,401, U.S. Pat. No. 9,231,582; US 2015-0214055 A1, US 2015-0214299 A1; U.S. Ser. No. 14/882,316, U.S. Ser. No. 14/918,440, U.S. Ser. No. 14/930,627, U.S. Ser. No. 14/935,336, U.S. Ser. No. 14/937,814, U.S. Ser. No. 14/945,097, U.S. Ser. No. 14/992,971, U.S. Ser. No. 14/957,516, U.S. Ser. No. 14/935,344, U.S. Ser. No. 14/935,349; and all priority applications of any of the above thereof. All of these applications and patents have at least some common ownership, copendency, and/or inventorship with the present application, and all of them, as well as any material directly or indirectly incorporated within them, are hereby incorporated by reference.

(26) Optionally, the techniques described above can be used for inverting based on more than three voltage levels.

(27) For another example, the transistors can be made of silicon or silicon carbide, or other semiconductor materials (particularly those with a relatively long minority carrier lifetime).

(28) None of the description in the present application should be read as implying that any particular element, step, or function is an essential element which must be included in the claim scope: THE SCOPE OF PATENTED SUBJECT MATTER IS DEFINED ONLY BY THE ALLOWED CLAIMS. Moreover, none of these claims are intended to invoke paragraph six of 35 USC section 112 unless the exact words “means for” are followed by a participle.

(29) The claims as filed are intended to be as comprehensive as possible, and NO subject matter is intentionally relinquished, dedicated, or abandoned.