A semiconductor device includes a backside contact and a substrate. An epitaxial field stop region may be formed on the substrate with a graded doping profile that decreases with distance away from the substrate, and an epitaxial drift region may be formed adjacent to the epitaxial field stop region. A frontside device may be formed on the epitaxial drift region.

A semiconductor device includes a semiconductor part having a first surface and a second surface opposite to the first surface, a first electrode on the first surface, a second electrode on the second surface, first to third control electrodes between the first electrode and the semiconductor part. The first to third control electrodes are biased independently from each other. The semiconductor part includes a first layer of a first-conductivity-type, a second layer of a second-conductivity-type, a third layer of the first-conductivity-type and the fourth layer of the second-conductivity-type. The second layer is provided between the first layer and the first electrode. The third layer is selectively provided between the second layer and the first electrode. The fourth layer is provided between the first layer and the second electrode. The second layer opposes the first to third control electrode with insulating films interposed.

A semiconductor device includes: an n type semiconductor layer including an active region and an inactive region; an element structure formed in the active region and including at least an active side p type layer to form pn junction with n type portion of the n type semiconductor layer; an inactive side p type layer formed in the inactive region and forming pn junction with the n type portion of the n type semiconductor layer; a first electrode electrically connected to the active side p type layer in a front surface of the n type semiconductor layer; a second electrode electrically connected to the n type portion of the n type semiconductor layer in a rear surface of the n type semiconductor layer; and a crystal defect region formed in both the active region and the inactive region and having different depths in the active region and the inactive region.

A semiconductor device, including a substrate, a deposition layer deposited on the substrate, a semiconductor region selectively provided in the deposition layer, a semiconductor layer provided on the deposition layer and the semiconductor region, a first region and a second region selectively provided in the semiconductor layer, a gate electrode provided on the second region and the semiconductor layer via a gate insulating film, a source electrode in contact with the semiconductor layer and the second region, an interlayer insulating film covering the gate electrode, a drain electrode provided on the substrate, a plating film selectively provided on the source electrode at portions thereof on which the protective film is not provided, and a pin-shaped electrode connected to the plating film via solder. The second region is not formed directly beneath a portion where the plating film, the protective film and the source electrode are in contact with one another.

Methods of maintaining a state of a memory cell without interrupting access to the memory cell are provided, including applying a back bias to the cell to offset charge leakage out of a floating body of the cell, wherein a charge level of the floating body indicates a state of the memory cell; and accessing the cell.

In one embodiment, the semiconductor devices relate to using one or more super-junction trenches for termination.

A semiconductor device comprises a vertical power device, such as a superjunction MOSFET, an IGBT, a diode, and the like, and a surface device that comprises one or more lateral devices that are electrically active along a top surface of the semiconductor device.

A silicon carbide semiconductor device has a silicon carbide substrate and an insulating film. The silicon carbide substrate includes a termination region having a peripheral edge, and an element region surrounded by the termination region. The insulating film is provided on the termination region. The termination region includes a first impurity region having a first conductivity type, and a field stop region having the first conductivity type, being in contact with the first impurity region and having a higher impurity concentration than the first impurity region. The field stop region is at least partially exposed at the peripheral edge.

A method for manufacturing an epitaxial wafer comprising a silicon carbide substrate and a silicon carbide voltage-blocking-layer, the method includes: epitaxially growing a buffer layer on the substrate, doping a main dopant for determining a conductivity type of the buffer layer and doping an auxiliary dopant for capturing minority carriers in the buffer layer at a doping concentration less than the doping concentration of the main dopant, so that the buffer layer enhances capturing and extinction of the minority carriers, the minority carriers flowing in a direction from the voltage-blocking-layer to the substrate, so that the buffer layer has a lower resistivity than the voltage-blocking-layer, and so that the buffer layer includes silicon carbide as a main component; and epitaxially growing the voltage-blocking-layer on the buffer layer.

A mist-CVD apparatus contains a first atomizer for atomizing a first metal oxide precursor and generating a first mist of the first metal oxide precursor; a second atomizer for atomizing a second metal oxide precursor and generating a second mist of the second metal oxide precursor; a carrier-gas supplier for supplying a carrier gas to convey the first and second mists; a film-forming unit for forming a film on a substrate by subjecting the first and second mists to a thermal reaction; and a first conveyance pipe through which the first mist and the carrier gas are conveyed to the film forming chamber, a second conveyance pipe through which the second mist and the carrier gas are conveyed to the film forming chamber.