LOW-WARPAGE CERAMIC CARRIER PLATE AND METHOD FOR PRODUCTION

Abstract

For a carrier plate, it is proposed to brace a first ceramic functional layer over a connecting layer (VS) with a ceramic stressing layer (SPS) in order to reduce the lateral sintering shrinkage. The functional layer (FS) and the stressing layer (SPS) are glass-free or have only a small glass content of less than 5 wt %, whereas the connecting layer (VS) comprises a glass component or is a glass layer.

Claims

1. Carrier plate for an electrical component, having a first ceramic functional layer having a connecting layer (VS) having a ceramic stressing layer (SPS) in which the ceramic functional layer (FS) is connected via the connecting layer (VS) with the ceramic stressing layer (SPS) to form a carrier plate (TP) a passive electrical component that can be connected with the electrical component is integrated into the ceramic functional layer (FS) the functional layer (FS) and the stressing layer (SPS) are glass-free or have only a small glass content of less than 5 wt % the connecting layer (VS) comprises a glass component or is a glass layer.

2. Carrier plate according to claim 1, in which the thickness of the connecting layer (VS) is 0.5-10 μm.

3. Carrier plate according to claim 1 or 2, in which the connecting layer (VS) also contains a non-sintering ceramic filler in addition to the glass component.

4. Carrier plate according to one of the claims 1-3, in which the stressing layer (SPS) has a sintering temperature that is above the sintering temperatures of the functional layer (FS) and the connecting layer (VS).

5. Carrier plate according to one of the claims 1-4, in which the stressing layer (SPS) has a relatively low coefficient of thermal expansion CTE that is smaller than the coefficient of thermal expansion CTE.sub.F of the functional layer (FS).

6. Carrier plate according to one of the claims 1-5, having a second connecting layer (VS2) and a second stressing layer (SPS2), wherein the second stressing layer is connected via the second connecting layer with that surface of the functional layer (FS) that faces away from the first stressing layer, such that the carrier plate has a symmetrical structure with regard to layer sequence, materials and layer thicknesses.

7. Carrier plate according to one of the claims 1-6, in which the at least one connecting layer (VS) comprises oxides of Si and/or Ge, B and K as primary components that, in total, comprise at least 70 wt % of the connecting layer, wherein the content up to 100 wt % in the connecting layer is formed by final sintering fillers.

8. Carrier plate according to one of the claims 1-7, in which the functional layer (FS) comprises a layer made from a varistor material and has at least two electrode layers (EL1, EL2).

9. Carrier plate according to one of the claims 1-7, in which the functional layer (FS) is selected from a layer of an NTC or PTC ceramic, a ceramic multi-layer capacitor, a ferrite layer, a piezoelectric layer, and an LTCC ceramic.

10. Carrier plate according to one of the claim 8 or 9, in which the functional layer (FS) has at least two different partial layers (FS1, FS2) having different electroceramic properties, and at least three metallization layers which are structured for different passive electrical components, wherein the different passive components are integrated into the functional layer.

11. Carrier plate according to one of the claims 1-10, in which the stressing layer (SPS) is a layer based on final sintering oxides and compounds such as ZrO.sub.2, MgO, SrCO.sub.3, BaCO.sub.3 or MgSiO.sub.4.

12. Method to manufacture a carrier plate according to claim 1, comprising the steps: a) provision of a green compact for a ceramic functional layer in which a passive electrical component is preformed b) application of a relatively thin layer of glass particles onto the green compact c) application of a green compact for a ceramic stressing layer onto the glass particles d) sintering of the structure at a temperature above the sintering temperature of the glass particles and of the ceramic functional layer e) controlled cooling of the structure, wherein a permanent bond with a 1-10 μm thick glass layer is created, and the lateral sintering shrinkage is limited to a value of less than 3% per axis.

13. Method according to claim 12, in which the green compact for the ceramic functional layer comprises at least one green tape in which the layer of glass particles is applied in the form of a paste onto the at least one green tape, in which a paste or a green tape is applied onto the layer of glass particles as a green compact for the ceramic stressing layer.

14. Method for manufacturing a carrier plate according to claim 1, having the alternative steps: A) provision of a solid ceramic plate for a stressing layer (SPS), B) application of a relatively thin layer (GV) of glass particles onto the stressing layer C) application of a green compact for a ceramic functional layer (GF) onto the layer (GV) of glass particles, and preforming of a passive electrical component therein d) sintering of the structure at a temperature that is above the sintering temperature of the glass particles and of the ceramic functional layer, e) controlled cooling of the structure, wherein a permanent bond with a 1-10 μm thick glass layer VS is created, and the lateral sintering shrinkage is limited to a value of less than 3% per axis.

15. Method according to claims 1-14, additionally including the step f) implementation of a mechanical removal method after the cooling, in which the stressing layer (SPS) is removed again.

16. Method according to claim 15, in which sandblasting, brushing or abrasion are used as a removal method.

17. Method according to one of the claims 12-16, in which, after step E) or e), the uppermost contacts of the passive components under the glass layer in the permanent composite are revealed, in which electrical terminal surfaces for an electrical component are applied onto the composite in electrically conductive contact with the uppermost contacts.

Description

BRIEF DESCRIPTION OF THE DRAWINGS

[0036] FIG. 1 shows a first carrier plate in schematic cross section,

[0037] FIG. 2 shows a second carrier plate in schematic cross section,

[0038] FIG. 3 shows a detail from FIG. 1 or 2,

[0039] FIGS. 4A through 4D show various method stages in the manufacturing of a carrier plate according to a first embodiment,

[0040] FIGS. 5A through 5C show various method stages in the manufacturing of a carrier plate according to a second embodiment,

[0041] FIG. 6 shows a functional layer having an exemplary passive component integrated therein, in schematic cross section,

[0042] FIG. 7 shows the functional layer of FIG. 6 after sintering, with remaining connecting layer,

[0043] FIG. 8 shows the functional layer of FIG. 7 after the application of electrical terminal surfaces,

[0044] FIG. 1 shows a simple embodiment of a carrier plate according to the invention, in which a stressing layer SPS is installed over a first functional layer FS by means of a connecting layer VS. For example, the functional layer FS comprises a functional ceramic based on a varistor ceramics, with a varistor formed therein.

[0045] For the connecting layer VS, a glass composition is prepared having 78 wt % SiO2, 19 wt % boric oxide, 3 wt % potassium oxide. Such a composition is matched with regard to the coefficient of expansion to the material of the varistor ceramics. The transition temperature of the glass is approximately 775°.

[0046] For example, the connecting layer VS is applied (via printing, for example) onto the functional layer FS in the form of a paste that comprises the cited glass components in finely distributed form. The layer thickness of the highly viscous connecting layer VS is approximately 2 to 10 μm.

[0047] For example, a green tape based on zirconium oxide is manufactured for the stressing layer SPS. The green tape is laminated onto the connecting layer VS over the functional layer FS.

[0048] The complete structure is subsequently sintered at 920° C. At this temperature, the glass component in the connecting layer VS melts and flows. Only the binder thereby burns off in the green tape for the stressing layer SPS, whereas the grain structure of the stressing layer SPS remains largely maintained without volume shrinkage. Nevertheless, the grains preserve a high strength among one another that is sufficient to achieve the bracing effect during the sintering of the carrier plate or of the structure. After controlled cooling to room temperature, the structure depicted in FIG. 1 is obtained.

[0049] The structure depicted in FIG. 1 may now serve as a substrate for an electrical component. However, it is also possible to remove the stressing layer SPS (which has a grained structure) again before the further processing to form the substrate. Mechanical removal methods lend themselves to this, for example sandblasting with a suitable particulate medium (for example with zirconium oxide grains), wet abrasion with abrasive articles or brushes. Abrasive brushing may be implemented in multiple stages, wherein brushes of different hardness are used in a series of sub-steps so that the abrasive brushing takes place with the softest brush in the last method step.

[0050] The dimensions of the functional layer are determined before and after the sintering, and the lateral shrinkage is thus ascertained. It has been shown that the carrier plate according to the invention exhibits a lateral shrinkage of less than 1.0%, measured along the x/y axes. Shrinkage beyond this is prevented by the stressing layer.

[0051] FIG. 2 shows a further embodiment of a carrier plate TP according to the invention, in which a second stressing layer SPS2 is applied opposite the first stressing layer SPS1 by means of a second connecting layer VS2. The arrangement thus has a symmetrical structure with the functional layer FS as a mirror plane. The application of the second stressing layer takes place like the application of the first stressing layer. The two stressing layers SPS1, SPS2 are applied either synchronously or in continuous succession. The sintering step takes place together for both bracing layers.

[0052] FIG. 3 shows a structural detail of a carrier plate TP according to the invention at the interface between stressing layer SPS, connecting layer VS and functional layer FS. The functional layer FS is compacted via sintering and is free of pores. The surface has a certain residual roughness that is to be ascribed to the grain structure of the stressing layer SPS. By contrast to this, the stressing layer SPS has the particle structure from which the original binder present in the interstices is burnt off during the sintering process. The particles in the stressing layer SPS have agood bonding among one another, mechanically stabilize the stressing layer, and thus enable the bracing effect.

[0053] The connecting layer VS adapts to the two surfaces of functional layer FS and stressing layer SPS and generates a large adhesion effect due to the increased area of interfaces. The respective boundary layer between connecting layer VS and the respective surface of stressing layer SPS and functional layer FS is designated as an interface.

[0054] FIGS. 4A through 4D show various method stages in the manufacturing of a carrier plate according to a first embodiment. As a pre-stage of the connecting layer VS, a layer GV of a glass paste in a thin layer thickness up to a maximum of 10 μm is applied onto the green body GF of a functional layer FS. FIG. 4 shows the arrangement. A stressing layer SPS is now applied onto the layer GV, for example by laminating on a green tape GS that comprises a dense arrangement of final sintering ceramic particles (based on zirconium oxide, for example) in a binder.

[0055] The structure is subsequently sintered, wherein the green tape GS of the stressing layer SPS largely retains its volume since only the binder burns off. The glass paste layer GV of the connecting layer VS softens and flows on the porous surface of the stressing layer SPS.

[0056] The green tape structure GF of the functional layer FS is subsequently sintered and thereby generates a sintering shrinkage due to compaction. However, this appears only in a reduction of the layer thickness at the transition from the green tape structure GF to the functional layer FS. The layer thickness reduces from the original d1 according to FIG. 4B to d2 according to FIG. 4C. The lateral shrinkage is prevented by the bracing with the stressing layer SPS. Upon cooling after the sintering, the structure remains largely form-stable and dimensionally stable and is reduced merely by the thermal expansion.

[0057] If the stressing layer SPS is used as a sacrificial layer, it must subsequently be mechanically removed, as is indicated by arrows in FIG. 4C.

[0058] FIG. 4D shows the arrangement after the removal of the stressing layer. The functional layer FS is now still covered only by a glass layer that corresponds to the original connecting layer VS. Due to the greater hardness of the glass layer or of the connecting layer, this is mechanically stable versus the chosen removal method.

[0059] FIGS. 5A through 5C show various method stages in the manufacturing of a carrier plate according to a second embodiment. Here a stressing layer SPS present as a solid plate is assumed, onto which a glass paste GV for the connecting layer VS is applied in a thinner layer thickness, up to a maximum of 10 μm. FIG. 5A shows the arrangement at this method stage.

[0060] A green tape GF or a green tape stack for the functional layer FS is now applied onto the layer GV of the glass particles, for example by being laminated on. However, it is also possible to individually laminate on the green tapes for the functional layer. FIG. 5B shows the arrangement at this method stage, with laminated green tapes for the functional layer FS.

[0061] In the next step, the sintering takes place similarly to as is described using FIGS. 4A through 4D. Here as well, upon sintering and cooling the bracing of the functional layer FS with the stressing layer SPS prevents a lateral sintering shrinkage, such that the sintering shrinkage occurs exclusively in the dimension vertical to the layer plane. By contrast, the layer thickness of the tape stack for the functional layer FS or of the individual functional layers FS reduces, as is visible in comparison to FIGS. 5B and 5C.

[0062] FIG. 6 shows an example of a passive component as it may be integrated into the stack of green tapes GF for the later functional layer FS. Arranged between two respective partial layers FS1, FS2, . . . of the functional ceramic is a respective structured electrode layer EL for the passive component. The electrode layers EL are alternately connected with a respective one of at least two feedthroughs DK1, DK2 so that first electrode layers EL1 are connected with a first feedthrough DK1, by contrast to which second electrode layers EL2 are connected with a second feedthrough DK2. Such an component structure may be realized with a varistor ceramic, for example, and thereby forms a varistor. This represents a protective component that conducts or discharges a current from first electrode to second electrode only as of an adjustable threshold voltage. If this threshold voltage is less than the overvoltage, the voltage may in this way be safely discharged upon reaching the threshold voltage.

[0063] However, the structure shown in FIG. 6 may also be a ceramic multi-layer capacitor in which the partial layers of the ceramic functional layer FS are executed from a dielectric. By applying a voltage between first and second electrode layer EL1, EL2, a capacitance forms between these two electrodes.

[0064] FIG. 7 shows the passive component depicted in FIG. 6 as a method product after sintering and the removal of the stressing layer. Only the glass layer of the original bracing layer VS is now still present over the functional layer FS.

[0065] In a single- or multi-stage process, a terminal surface AF may then be generated over the exposed upper ends of the feedthroughs DK and, in the adjacent edge region, on the surface of the glass layer of the original connecting layer VS. In a first sub-step, for this a via VA may be directed through the glass layer of the original connecting layer VS, for example via currentless metal deposition. The metallic electric terminal surface AF is subsequently generated over the filled via VA, for example via printing and firing of contacts. However, it is also possible to galvanically apply the contacts. FIG. 8 shows the arrangement at this method stage.

[0066] An electrical component may now be electrically and mechanically mounted on the terminal surfaces AF, wherein the carrier plate serves as a carrier for the component. Via the integrated passive component, a protective function may be realized in the carrier plate that protects the component from overvoltage, for example. However, other passive component functions may also be realized in the carrier plate in the form of corresponding passive components, and be connected with said component.

[0067] The invention [sic] explained using a few selected exemplary embodiments, and therefore is not limited to the presented embodiments and/or Figures. The invention is defined solely by the claims and encompasses additional variations within this scope. Sub-combinations of features of the claims are also considered to be according to the invention.

LIST OF REFERENCE SIGNS

[0068]

TABLE-US-00001 TP carrier plate FS ceramic functional layer (s) SPS ceramic stressing layer VS connecting layer GV glass paste layer for connecting layer CTE coefficient of thermal expansion GF green compact for a ceramic functional layer GS green compact for a ceramic stressing layer FS1, FS2 partial layers of the functional layer GS green tape for stressing layer AF electrical terminal surface VA via through connecting layer