C23C14/0682

WEAR RESISTANT VAPOR DEPOSITED COATING, METHOD OF COATING DEPOSITION AND APPLICATIONS THEREFOR

A low friction top coat over a multilayer metal/ceramic bondcoat provides a conductive substrate, such as a rotary tool, with wear resistance and corrosion resistance. The top coat further provides low friction and anti-stickiness as well as high compressive stress. The high compressive stress provided by the top coat protects against degradation of the tool due to abrasion and torsional and cyclic fatigue. Substrate temperature is strictly controlled during the coating process to preserve the bulk properties of the substrate and the coating. The described coating process is particularly useful when applied to shape memory alloys.

PLASMA BASED FILM MODIFICATION FOR SEMICONDUCTOR DEVICES

Disclosed herein are approaches for treating a film layer of a semiconductor device to modify an etch resistance of the film later. In one approach, a method may include forming a first film over a substrate base, depositing a second film over the first film, and introducing an inert species into the second film while the second film is deposited over the first film, wherein the inert species increases an etch-resistance of a first portion of the first film. The method may further include removing the second film by stopping deposition of the second film while continuing to introduce the inert species into the second film.

Silicon carbide single crystal substrate, silicon carbide semiconductor device, and method for manufacturing silicon carbide semiconductor device

A silicon carbide single crystal substrate includes a first main surface and a second main surface opposite to the first main surface. The first main surface includes a central square region and an outer square region. When viewed in a thickness direction, each of the central square region and the outer square region has a side having a length of 15 mm. The first main surface has a maximum diameter of not less than 100 mm. The silicon carbide single crystal substrate has a TTV of not more than 5 m. A value obtained by dividing a LTIR in the central square region by a LTV in the central square region is not less than 0.8 and not more than 1.2. A value obtained by dividing a LTV in the outer square region by the LTV in the central square region is not less than 1 and not more than 3.

MASK BLANK, PHASE SHIFT MASK, METHOD FOR MANUFACTURING PHASE SHIFT MASK, AND METHOD FOR MANUFACTURING SEMICONDUCTOR DEVICE
20180129130 · 2018-05-10 · ·

Provided is a mask blank including a phase shift film on a transparent substrate. This phase shift film includes a phase shift layer at least containing a transition metal and silicon, and a silicon layer, which is configured to attenuate exposure light with which the phase shift layer is irradiated, and the silicon layer is formed to be in contact with the substrate side of the phase shift layer. This mask blank is used in manufacturing a phase shift mask to which laser exposure light having a wavelength of 200 nm or less is applied.

Method for producing thermoelectric layers
09957602 · 2018-05-01 · ·

The invention relates to a method for producing thermoelectric layers by depositing thermoelectric material on a substrate by means of sputter deposition. In order to create a method for producing thermoelectric layers that are better suited for use in thermogenerators, and in particular have higher Seebeck coefficients, the production of a target made of thermoelectric material is proposed by mixing at least two powdered starting materials having a particle size from 0.01 ?m-5000 ?m, while coupling in energy and depositing the thermoelectric material from the target on the substrate by way of magnetron sputter deposition.

Molybdenum-based target and process for producing a target by thermal spraying

A target of a nominal thickness includes molybdenum. The target has a lamellar microstructure and an oxygen content of less than 1000 ppm, preferably less than 600 ppm, and even more preferably less than 450 ppm. An electrical resistivity of the target is less than five times, preferably three times and more preferably twice the theoretical electrical resistivity of the compound.

Wear resistant vapor deposited coating, method of coating deposition and applications therefor

A low friction top coat over a multilayer metal/ceramic bondcoat provides a conductive substrate, such as a rotary tool, with wear resistance and corrosion resistance. The top coat further provides low friction and anti-stickiness as well as high compressive stress. The high compressive stress provided by the top coat protects against degradation of the tool due to abrasion and torsional and cyclic fatigue. Substrate temperature is strictly controlled during the coating process to preserve the bulk properties of the substrate and the coating. The described coating process is particularly useful when applied to shape memory alloys.

SILICON CARBIDE SINGLE CRYSTAL SUBSTRATE, SILICON CARBIDE SEMICONDUCTOR DEVICE, AND METHOD FOR MANUFACTURING SILICON CARBIDE SEMICONDUCTOR DEVICE

A silicon carbide single crystal substrate includes a first main surface and a second main surface opposite to the first main surface. The first main surface includes a central square region and an outer square region. When viewed in a thickness direction, each of the central square region and the outer square region has a side having a length of 15 mm. The first main surface has a maximum diameter of not less than 100 mm. The silicon carbide single crystal substrate has a TTV of not more than 5 m. A value obtained by dividing a LTIR in the central square region by a LTV in the central square region is not less than 0.8 and not more than 1.2. A value obtained by dividing a LTV in the outer square region by the LTV in the central square region is not less than 1 and not more than 3.

Target formed of sintering-resistant material of high-melting point metal alloy, high-melting point metal silicide, high-melting point metal carbide, high-melting point metal nitride, or high-melting point metal boride, process for producing the target, assembly of the sputtering target-backing plate, and process for producing the same

Provided is a target formed of a sintering-resistant material of high-melting point metal alloy, high-melting point metal silicide, high-melting point metal carbide, high-melting point metal nitride or high-melting point metal boride comprising a structure in which a target material formed of a sintering-resistant material of high-melting point metal alloy, high-melting point metal silicide, high-melting point metal carbide, high-melting point metal nitride or high-melting point metal boride and a high-melting point metal plate other than the target material are bonded. Additionally provided is a production method of such a target capable of producing, with relative ease, a target formed of a sintering-resistant material of high-melting point metal alloy, high-melting point metal silicide, high-melting point metal carbide, high-melting point metal nitride or high-melting point metal boride, which has poor machinability, can relatively easily produced. Further the generation of cracks during the target production and high power sputtering, and the reaction of the target raw material with the die during hot pressing can be inhibited effectively, and the warpage of the target can be reduced.

MO-SI-B LAYERS AND METHOD FOR THE PRODUCTION THEREOF

The present invention concerns substrates coated with an Mo.sub.1-x-ySi.sub.xB.sub.y layer, said layer comprising the T2 phase, and a method for the production thereof.