A method is provided for testing switch signals of an inverter of an electric machine of a drive system of a motor vehicle. The electric machine is controlled via a pulse-width modulation generated by a control unit using a target duty cycle and a triangular-waveform voltage sequence. An actual duty cycle of a current pulse-width modulation is continuously ascertained from the switch signals and compared with the target duty cycle of the control unit.

A device for the detection of an ultra wide band signal, including a signal reception circuit, a signal divider circuit to divide the received signal into several frequency sub-bands, a circuit to determine the amplitude and duration of the received signal in each frequency sub-band, a circuit to compare the amplitude of the signal received in each frequency sub-band with an amplitude threshold, a circuit to compare the duration of the signal received in each frequency sub-band with a time threshold, and a decision circuit that determines that the received signal is of the ultra wide band type if the amplitude of the signal received in each frequency sub-band is higher than the amplitude threshold and if the duration of the signal received in each frequency sub-band is less than the time threshold.

Radio-frequency (RF) signal analysis includes slow-time signal processing and fast-time signal processing. Incoming RF pulses are captured according to a resource scheduling configuration. The fast-time signal processing is to prioritize the captured RF pulses for slow-time signal processing based on dynamic pulse-grading criteria. The slow-time signal processing is to perform relevance evaluation of the prioritized RF pulses, and to adjust the dynamic pulse-grading criteria and the resource scheduling configuration based on the relevance evaluation.

A feature detection system, the system comprising: at least one processor in operative communication with a signal source, said processor further comprising at least one non-transitory storage medium, wherein at least one non-transitory storage medium contains instructions configured to cause the processor to: apply a joint group sparse denoising and delay estimation approach to a signal received from said signal source; and output statistics regarding the signal, wherein the joint group sparse denoising and delay estimation approach comprises; using the following equation: $\left\{x^{*},{?}^{*}\right\}=\underset{x,?}{\mathrm{argmin}}\left\{\frac{1}{2}\underset{j=1}{\overset{M}{.Math.}}{.Math.y_j-x.Math.}_2^2+\underset{i=0}{\overset{N}{.Math.}}{?}_i{?}_i\left(D_i^{l_i}x\right)\right\}$
where: ?.sub.i are regularization functions; ?y?x?.sub.2.sup.2 is a data-fidelity term and, in embodiments, is chosen as the least-square term; l.sub.i are real numbers; D.sub.i are operators, which may be linear filters that can be written in matrix form; ?.sub.i are regularization parameters; and x*,?* represent estimates of at least one tr

A control method of multi-phase converters, wherein the multi-phase converter includes a plurality of switching circuits coupled in parallel between an input voltage and a load. The control method includes: comparing a feedback signal with a reference signal to generate a comparison signal, wherein the feedback signal is indicative of an output voltage provided to the load; determining the number of switching circuits for power operation based on the load current; detecting a period of the comparison signal; comparing the detected period of the comparison signal with a time threshold to determine whether a transient rise of load current has occurred; and getting all the switching circuits into power operation if a transient rise of load current is detected.

One embodiment is a method of deconvolving overlapping first and second pulses in a photon-counting CT scanning system, the method comprising detecting a first pulse event having a first detected level; detecting a second pulse event having a second detected level; determining an amount of time that elapses between the detected first pulse event and the detected second pulse event; and reconstructing the first pulse and the second pulse using the first and second detected levels, the duration of time between the first and second pulse events, and a known pulse shape.

An integrated circuit with clock detection and selection function for use in a storage device includes: an embedded oscillator, a detection circuit and a selection circuit. The embedded oscillator is configured to generate an embedded clock signal. The detection circuit includes a sampling and counting circuit and a clock determination circuit. The detection circuit, and is configured to detect existence of a reference clock signal provided by a host based on sampling and counting operations that are performed according to a signal on a clock signal lane and the embedded clock signal. The selection circuit is coupled to the detection circuit and the embedded oscillator, and is configured to select one of the embedded clock signal and the signal on the clock signal lane according to the existence of the reference clock signal as an output clock signal, thereby to provide the output clock signal to the storage device.

The invention provides a semiconductor device capable of diagnosing communication network quality. Disclosed is a semiconductor device that is coupled to a light source, the semiconductor device including a signal processing unit that is coupled to an interface module and transmits and receives a command signal to increase or decrease illumination intensity of the light source and a deterioration detector that detects deterioration of the interface module, based on whether or not change timing of a signal representing data of a command signal received by the interface module falls within a predetermined interval.

The invention provides a semiconductor device capable of diagnosing communication network quality. Disclosed is a semiconductor device that is coupled to a light source, the semiconductor device including a signal processing unit that is coupled to an interface module and transmits and receives a command signal to increase or decrease illumination intensity of the light source and a deterioration detector that detects deterioration of the interface module, based on whether or not change timing of a signal representing data of a command signal received by the interface module falls within a predetermined interval.

In accordance with aspects of the present invention, a method of synchronizing two integrated circuits is presented. A method of synchronizing two integrated circuits can include sending a first pulse from a master IC to a slave IC over a SYNC bus; receiving a second pulse on the SYNC bus from the slave IC; checking the second pulse; triggering an interrupt if a failure is detected; and initiating measurement if synchronization is detected.