Patent classifications
G01R31/2832
SPARK GAP STRUCTURES FOR DETECTION AND PROTECTION AGAINST ELECTRICAL OVERSTRESS EVENTS
The disclosed technology generally relates to electrical overstress protection devices, and more particularly to electrical overstress monitoring devices for detecting electrical overstress events in semiconductor devices. In one aspect, an electrical overstress monitor and/or protection device includes a two different conductive structures configured to electrically arc in response to an EOS event and a sensing circuit configured to detect a change in a physical property of the two conductive structures caused by the EOS event. The two conductive structures have facing surfaces that have different shapes;
METHOD FOR PREDICTING ELECTRICAL CHARACTERISTICS OF SEMICONDUCTOR ELEMENT
The electrical characteristics of a semiconductor element are predicted from a process list. A feature-value calculation portion and a feature prediction portion are used to predict the electrical characteristics of the semiconductor element. The feature-value calculation portion includes a first learning model and a second learning model, and the feature prediction portion includes a third learning model. The first learning model includes a step of learning the process list for generating the semiconductor element and a step of generating a first feature value. The second learning model includes a step of learning the electrical characteristics of the semiconductor element generated in accordance with the process list and a step of generating a second feature value. The third learning model includes a step of performing multimodal learning with use of the first feature value and the second feature value and a step of outputting a value of a variable used in a formula for the semiconductor element characteristics. The first to third learning models include neural networks different from each other.
Accelerated measurements through adaptive test parameter selection
A method for measuring electrical response of a DUT includes using a measurement instrument, generating a radio frequency (RF) test signal via the measurement instrument at one or more initial frequencies, propagating the RF test signal at the one or more initial frequencies to the DUT, measuring a response of the DUT at the one or more initial frequencies and aggregating the measured response of the DUT at the one or more initial frequencies as response measurement data. The method then includes iteratively performing, until characterization of the DUT achieves a minimum criterion, the steps of adaptively selecting an additional frequency at which to generate a RF test signal based on the response measurement data based on a predetermined adaptive frequency algorithm, generating the RF test signal at the adaptively selected additional frequency, measuring a response of the DUT at the adaptively selected additional frequency, and adding the measured response of the DUT at the adaptively selected additional frequency to the response measurement data.
SYSTEMS, METHODS, AND APPARATUSES FOR INTRUSION DETECTION AND ANALYTICS USING POWER CHARACTERISTICS SUCH AS SIDE-CHANNEL INFORMATION COLLECTION
Some embodiments described herein include a system that collects and learns reference side-channel normal activity, process it to reveal key features, compares subsequent collected data and processed data for anomalous behavior, and reports such behavior to a management center where this information is displayed and predefine actions can be executed when anomalous behavior is observed. In some instances, a physical side channel (e.g. and indirect measure of program execution such as power consumption or electromagnetic emissions and other physical signals) can be used to assess the execution status in a processor or digital circuit using an external monitor and detect, with extreme accuracy, when an unauthorized execution has managed to disrupt the normal operation of a target system (e.g., a computer system, etc.).
Method of generating self-test signals, corresponding circuit and apparatus
A radio-frequency receiver includes built-in-self-test (BIST) circuitry which generates a self-test signal. A local oscillator signal is divided. A self-test oscillation signal is generated, based, at least in part, on the frequency-divided local oscillation signal. The self-test signal is generated based on the self-test oscillation signal. The BIST circuitry includes a divider, which divides the self-test oscillation signal. The frequency-divided local oscillation signal and the divided self-test oscillation signal are used to perform one or more of generating the self-test oscillation signal and controlling the generation of the self-test oscillation signal. The radio-frequency receiver may be an automotive radar receiver.
Test system and method of operating the same
A test system includes a plurality of test core devices and a plurality of first buses. The plurality of test core devices are electrically connected to a device under test (DUT). The plurality of first buses are electrically connected to the test core devices, where at least one set of test core devices selected from the plurality of test core devices are merged to be a merged test core device through one or more of the plurality of first buses.
INTEGRATED REQUIREMENTS DEVELOPMENT AND AUTOMATED GAP ANALYSIS FOR HARDWARE TESTING USING NATURAL LANGUAGE PROCESSING
A method includes analyzing testing capabilities information associated with multiple pieces of testing equipment by performing a first natural language processing (NLP) operation to identify capabilities of the testing equipment during hardware testing. The method also includes analyzing testing requirements information associated with a design of a hardware device by performing a second NLP operation to identify characteristics of testing requirements to be used to test the hardware device. The method further includes identifying at least one gap between the testing requirements to be used to test the hardware device and the capabilities of the testing equipment. In addition, the method includes generating a graphical user interface identifying the at least one gap.
METHOD AND APPARATUS FOR DELIVERING A THERMAL SHOCK
The subject disclosure relates to a system and method for testing units-under-test (UUT) with a thermal shock. The thermal shock testing system can include a chamber having an inlet and an outlet, the chamber being configured to provide a thermal shock to a unit-under-test (UUT), a pump configured to fluidly connect to the inlet of the chamber and direct a temperature controlled liquid through a channel embedded in the chamber, and a boiler and a chiller fluidly connected to the pump, the temperature of the liquid being controlled by at least one valve configured to alternatively direct hot or cold fluid to the inlet of the chamber.
Spark gap structures for detection and protection against electrical overstress events
The disclosed technology generally relates to electrical overstress protection devices, and more particularly to electrical overstress monitoring devices for detecting electrical overstress events in semiconductor devices. In one aspect, an electrical overstress monitor and/or protection device includes a two different conductive structures configured to electrically arc in response to an EOS event and a sensing circuit configured to detect a change in a physical property of the two conductive structures caused by the EOS event. The two conductive structures have facing surfaces that have different shapes.
Systems, methods, and apparatuses for intrusion detection and analytics using power characteristics such as side-channel information collection
Some embodiments described herein include a system that collects and learns reference side-channel normal activity, process it to reveal key features, compares subsequent collected data and processed data for anomalous behavior, and reports such behavior to a management center where this information is displayed and predefine actions can be executed when anomalous behavior is observed. In some instances, a physical side channel (e.g. and indirect measure of program execution such as power consumption or electromagnetic emissions and other physical signals) can be used to assess the execution status in a processor or digital circuit using an external monitor and detect, with extreme accuracy, when an unauthorized execution has managed to disrupt the normal operation of a target system (e.g., a computer system, etc.).