An information handling system includes a management controller that may determine average power consumption of a processor, and determine average power measurement at a power supply unit. If the average power consumption of the processor does not match the average power measurement at the power supply unit, then the system may calibrate the average power consumption of the processor to match the average power measurement at the power supply unit.

A method for detecting high-frequency AC currents in a DC circuit including a common mode choke with two partial windings includes tapping voltages dropping across the two partial windings due to the AC current, superposing the tapped voltages, and obtaining a superposed AC voltage wherein differential mode portions of the tapped voltages are summed constructively and common mode portions of the voltages are summed destructively; and measuring the superposed AC voltage.

The disclosed technology generally relates to electrical overstress protection devices, and more particularly to electrical overstress monitoring devices for detecting electrical overstress events in semiconductor devices. In one aspect, an electrical overstress monitor and/or protection device includes a two different conductive structures configured to electrically arc in response to an EOS event and a sensing circuit configured to detect a change in a physical property of the two conductive structures caused by the EOS event. The two conductive structures have facing surfaces that have different shapes;

A system, apparatus, and method for testing a squib circuit. An electrical signature of the squib circuit is monitored when a test switch in the squib circuit is activated. The electrical signature of the squib circuit is based on characterizing resistors electrically connected to squibs in the squib circuit in which each characterizing resistor in the characterizing resistors has a resistance value. A health of each squib in the squib circuit is determined based on the electrical signature of the squib circuit.

An electrostatic discharge (ESD) shielding semiconductor device and an ESD testing method thereof, the ESD shielding semiconductor device includes an integrated circuit, a seal ring and a conductive layer. The integrated circuit is disposed on a die, and the integrated circuit has a first region and a second region. The seal ring is disposed on the die to surround the integrated circuit. The conductive layer at least covers the first region, and which is electrically connected to the seal ring.

Embodiments described herein provide a system for cable length measurement in a communication system. The system includes a transmitter, a receiver, a signal sampler and a cable length calculation unit. The transmitter is configured to transmit a plurality of data symbols at a first data rate via a wired data communication link, and the receiver is configured to receive a reflection signal. The signal sampler is configured to sample the received reflection signal using a phase shift number of shifting sampling phases to generate reflection samples, and combine the reflection samples with different sampling phases to generate a series of reflection samples corresponding to a second data rate higher than the first data rate. The cable length calculation unit is configured to determine a delay parameter from the series of reflection samples, and generate an estimate of a length of the data communication link.

The disclosed technology generally relates to electrical overstress protection devices, and more particularly to electrical overstress monitoring devices for detecting electrical overstress events in semiconductor devices. In one aspect, an electrical overstress monitor and/or protection device includes a two different conductive structures configured to electrically are in response to an EOS event and a sensing circuit configured to detect a change in a physical property of the two conductive structures caused by the EOS event. The two conductive structures have facing surfaces that have different shapes;

Over at least part of a lifetime of a product circuit, quiescent current to a product circuit is periodically measured. Over the part of the lifetime of the product circuit, voltage to the product circuit is periodically adjusted based on the monitored quiescent current. Methods, apparatus, and computer program product are disclosed. A calibration procedure may also be performed as part of manufacturing the product circuit, in order to provide values for the quiescent current and corresponding voltage to which the voltage should be adjusted.

Some embodiments described herein include a system that collects and learns reference side-channel normal activity, process it to reveal key features, compares subsequent collected data and processed data for anomalous behavior, and reports such behavior to a management center where this information is displayed and predefine actions can be executed when anomalous behavior is observed. In some instances, a physical side channel (e.g. and indirect measure of program execution such as power consumption or electromagnetic emissions and other physical signals) can be used to assess the execution status in a processor or digital circuit using an external monitor and detect, with extreme accuracy, when an unauthorized execution has managed to disrupt the normal operation of a target system (e.g., a computer system, etc.).

A test arrangement for emulating phase currents of an electric motor for testing a power electronic control unit. The control unit drives the electric motor and can be connected to the test arrangement. An inductance emulator simulates the electric motor as an electrical load for the control unit via a power electronic circuit, the inductance emulator acting as a current source. A test device influences the phase current of the inductance emulator as a function of an analysis of an output voltage of the control unit. The test device performs the analysis such that the output voltage of the control unit is compared with multiple, preferably three, voltage ranges, and a respective range for a control variable of the phase current is specified depending on the voltage range in which the output voltage of the control unit is located, which control variable is a control voltage of the inductance emulator.