A resistive floating electrode device (RFED) provides a logic cell or non-volatile storage or dynamic or static random access memory on an extremely compact matrix with individual cells scalable to the minimum available lithographic feature size regime by providing atomic switches connected in anti-parallel relationship, preferably with a common inert electrode. Programming is facilitated by limiting current to a compliance current level in order to maintain an OB state from which the cell can be written to either the 0 or 1 state. A perfecting feature of the invention provides for selective operation of a cell as a diode or in a volatile or non-volatile storage mode within the same memory array. A series connection of three or more RFEDs in accordance with the invention having different ON state currents, OFF state currents and reset currents can be used as adaptive, neural or chaotic logic cells.

A method for manufacturing resistive random access memories, each resistive random access memory including first and second electrodes separated by a layer of active material, the method including producing connector elements with a step Cp along a first direction, each connector element having a width Cb along the first direction; producing a plurality of first electrodes with a step Ep along the first direction, each first electrode having a first end surface and a second end surface, the second end surface having a width Eb along the first direction and an area greater than the area of the first end surface; wherein: 0<Ep−Eb≦Cp−Cb and:Eb<Cp−Cb such that, for each connector element, a first electrode is in contact, via its second end surface, with the connector element, and each first electrode is only in contact, via its second end surface, with at the most one connector element.

A method for reading an electronic memory device including N memory cells Ci with 1≧i≧N and N≧2, each cell Ci having a resistance Ri, the method including for each cell Ci, determining a set Ei of resistance values capable of being associated with the resistance Ri of the cell Ci; for each combination of N variables Vi, each variable Vi taking successively each resistance value among the predetermined set Ei, applying a mathematical function to the combination to obtain a resulting resistance value; for each combination of N variables Vi, associating a logic state of the electronic memory device with the resulting resistance value obtained previously, according to a comparison of the resulting resistance value with a same threshold resistance value; associating a resistance value with each resistance Ri to obtain a particular combination of N variables Vi; determining the logic state of the electronic memory device.

Stochastic or near-stochastic physical characteristics of resistive switching devices are utilized for generating data distinct to those resistive switching devices. The distinct data can be utilized for applications related to electronic identification. As one example, data generated from physical characteristics of resistive switching devices on a semiconductor chip can be utilized to form a distinct identifier sequence for that semiconductor chip, utilized for verification applications for communications with the semiconductor chip or utilized for generating cryptographic keys or the like for cryptographic applications.

A memory element can include a first electrode; at least one switching layer formed over the first electrode; a second electrode layer; and at least one conductive cap layer formed over the second electrode layer having substantially no grain boundaries extending through to the second electrode layer; wherein the at least one switching layer is programmable between different impedance states by application of electric fields via that first and second electrode. Methods of forming such memory elements are also disclosed.

Provided is a semiconductor device including a substrate, a tunneling insulating film disposed on the substrate, a control gate electrode disposed on the tunneling insulating film, a first floating gate electrode disposed between the control gate electrode and the tunneling insulating film, a second floating gate electrode disposed between the first floating gate electrode and the tunneling insulating film, a first control gate insulating film disposed between the first floating gate electrode and the control gate electrode, a second control gate insulating film disposed between the second floating gate electrode and the first floating gate electrode, and a source electrode and a drain electrode disposed on the substrate to be spaced apart from each other with respect to the control gate electrode, wherein the control gate electrode includes a first metal material, wherein the first floating gate electrode includes a second metal material, wherein the second floating gate electrode includes a third metal material, wherein the first to third metal materials are different from each other, wherein an oxidizing power of the second metal material is smaller than an oxidizing power of the first metal material.

A system and method of secure communication between computing devices based on physical unclonable functions such as memories having dissolvable conductive paths is provided. The method involves enrolling a client device, the client device having a PUF such as a pristine ReRAM. The PUF is enrolled in a secure environment by reading and storing the resistances of the PUF's addressable memory cells. The cells are categorized into “rugged” and “vulnerable” categories on the basis of their resistance, the vulnerable cells being those more likely to be permanently altered during the generations of PUF responses. The rugged cells are used for the generation of PUF responses for cryptographic key generation, but the vulnerable cells may be inspected to detect unauthorized 3rd party access to the PUF.

A resistive random access memory device includes a first electrode; a solid metal oxide electrolyte; and a second electrode, the first and second electrodes being respectively arranged on either side of the solid metal oxide electrolyte, the second electrode being capable of supplying mobile ions circulating in the solid metal oxide electrolyte to the first electrode to form a conductive filament between the first and second electrodes when a potential difference is applied between the first and second electrodes. The device further includes an interface layer including a metal oxide, the interface layer extending at least partially onto the first electrode, the solid metal oxide electrolyte extending at least partially onto the interface layer.

According to an embodiment of the present disclosure, a device and a method are provided. The device includes one or more resistive random access memory (ReRAM) elements. The device further includes a random number generator configured to generate a random number in dependence on impedance values of the one or more ReRAM elements.

Programmable interposers for connecting integrated circuits, methods for programming programmable interposers, and integrated circuit packaging are provided. The programmable interposers are electrically reconfigurable to allow custom system-in-package (SiP) operation and configuration, field configurability, and functional obfuscation for secure integrated circuits fabricated in non-trusted environments. The programmable interposer includes, in one implementation, an interposer substrate and a programmable metallization cell (PMC) switch. The PMC switch is formed on the interposer substrate and is coupled between a signal input and a signal output. The PMC switch is electrically configurable between a high resistance state and a low resistance state.