An object is to provide an information processing apparatus capable of reducing a circuit area. An information processing apparatus (1) according to the present disclosure includes a plurality of memories (11A, 11B) configured to store one row of data of input image data as a whole, a plurality of multiplexers (12A, 12B) configured to select one of the memories to take a part of the one row of data from the selected memory; and a hardware controller (13) configured to select one of the memories storing the part of the one row of data.

Technology is disclosed herein for efficient use of volatile memory that is used for accumulating parity data of user data being written to non-volatile memory cells. A memory controller may replace primary parity in a first portion of a parity buffer with data other than primary parity while a second portion of the buffer is still being used to store the primary parity. Therefore, the memory controller smartly re-uses the parity buffer, which makes efficient use of the volatile memory. In one aspect, a memory controller accumulates secondary parity for the user data in a first portion of the parity buffer while a second portion of the parity buffer is still being used to store the primary parity. The memory controller may compute the secondary parity from present content of the first portion of the parity buffer and primary parity presently stored in the second portion of the buffer.

A solid state drive (SSD) is presented herein that includes a plurality of memory dies communicatively arranged in a plurality of communication channels such that each respective memory die is associated with a respective one communication channel of the plurality of communication channels, each respective memory die comprises one or more die regions, and each of the one or more die regions comprises a plurality of physical blocks configured to store data. The SSD further includes a memory controller communicatively coupled to the plurality of memory dies. The memory controller is configured to, upon a first power up of the SSD, determine a parameter of the SSD and for each of the one or more die regions, associate, based on the parameter, a number of physical blocks of the plurality of physical blocks with a block region of a plurality of block regions.

Certain aspects of the present disclosure provide a method, including: storing a depthwise convolution kernel in a first one or more columns of a CIM array; storing a fused convolution kernel in a second one or more columns of the CIM array; storing pre-activations in one or more input data buffers associated with a plurality of rows of the CIM array; processing the pre-activations with the depthwise convolution kernel in order to generate depthwise output; modifying one or more of the pre-activations based on the depthwise output to generate modified pre-activations; and processing the modified pre-activations with the fused convolution kernel to generate fused output.

A system and method employing a distributed hardware architecture, either independently or in cooperation with an attendant data structure, in connection with various data processing strategies and data analytics implementations are disclosed. A compute node may be implemented independent of a host compute system to manage and to execute data processing operations. Additionally, an unique algorithm architecture and processing system and method are also disclosed. Different types of nodes may be implemented, either independently or in cooperation with an attendant data structure, in connection with various data processing strategies and data analytics implementations.

Using an alternative communication protocol between a first system and a second system that are otherwise configured to communicate using a FICON protocol includes the first system determining if the alternative communication protocol is handled by the second system, the first system providing encapsulated data by encapsulating FICON data if the alternative communication protocol is handled at the second system, and the first system transmitting the encapsulated data directly to the second system using the alternative communication protocol if the alternative communication protocol is handled at the second system. The alternative communication protocol may be TCP/IP. At least one of the systems is a host computing system, an array storage system, and/or a tape emulation system. At least one of the systems may be a simulation of a host computing system, an array storage system, and/or a tape emulation system.

Systems and methods described herein synchronize events between various components of storage device during the processing of an exception (i.e., an internal error). The storage device can have a plurality of processors which may each coordinate operations on various domains of storage device processing tasks. An exception occurring in one domain may require input and coordination from other domains within the storage device. Each exception may have a list of predetermined steps needed for completion which are coordinated via a series of sync points placed between exception action clusters which perform a series of specific operations until data or processing from another domain is needed to continue processing. The sync points can be utilized to halt processing in one domain until the other domains are in sync and complete one or more exception action operations. In this way, a streamlined and predictable synchronization between domains may occur during an exception.

A server memory device provides highspeed storage to a computer system. The server memory device has a connector that can make electrical coupling with the computer system. The server memory device includes two memory modules, each with one or more memory chips. Each memory module is coupled and bonded with an interposer. Each interposer is coupled and bonded with the server memory device connector. The connector and interposers provide a high-density interconnect that connects two memory modules to a computer system. The server memory device has a form factor that uses a single unit (1U) of a server rack, doubling the memory capacity provided to the computer system through a single unit (1U) equipment rack.

An approach is provided for providing optimized identification of duplicate data in a networked computing environment. An aggregate feature vector is created that is specific to an attribute of the data (e.g., a field that holds specific informational content). The aggregate feature vector has a set of dimensions that each define a specific comparison function used to test for similarity between data entries in the attribute. Each dimension in the aggregate feature vector is assigned an effectiveness, and a cost is computed for each dimension. Based on these two, a subset of dimensions is selected to form an optimized feature vector. This optimized feature vector can then be used to analyze a dataset to find matching data.

A computer-implemented method for dynamic storage pricing in a multitenant environment is disclosed. The computer-implemented method includes dynamically modifying a storage cost for one or more tenants pointing to a block written to a storage area of the multitenant environment based, at least in part, on detecting a change in a number of tenants pointing to the block.