A loading control method and system for a storage device are disclosed. The method comprises: judging whether a storage controller is valid through a first bus, and judging whether a storage controller is valid through a first bus, and acquiring a key of the storage controller if a positive judgement is made; judging whether the key is valid, commanding the storage controller to turn on a power supply of a storage device if a positive judgement is made; and loading the storage device through a second bus. According to the method, storage devices based on windows and android are allowed to be loaded after the storage device verification is successful, and by means of the method, data security of a user can be effectively protected, which provides reliable and effective protection for future private cloud service data.

A communications link between a computing device and an external device is monitored. A driver for the communications link is executed on the computing device. The driver is configured to monitor data traffic over the communications link. Data indicative of the monitored data traffic is received from the driver. The data is sent to an analysis function configured to identify a condition of the communications link based on accumulated data indicative of the data traffic. Data indicative of an identified condition of the communications link is received from the analytics function. An indication of the identified condition is rendered on a display device of the computing device.

A signal transmitter of the invention is coupled to a plurality of signal receivers by a bus, and is configured to transmit display data through the bus for displaying a line. The signal transmitter includes a first data sequence and a second data sequence. The first data sequence has an electronic characteristic of a first value and is transmitted to a first signal receiver of the signal receivers, and the second data sequence has the electronic characteristic of a second value to a second signal receiver of the signal receivers. Wherein, a first signal transmission path from the signal transmitter to the first signal receiver is shorter than a second signal transmission path from the signal transmitter to the second signal receiver, and the first value is larger than the second value.

According to one embodiment, an interface system includes a receiver, a first clock generator, a second clock generator, and a sampling circuit. The receiver is configured to receive a first clock and serial data from a host. The first clock generator includes a first voltage controlled oscillator (VCO) and is configured to generate a second clock on the basis of the first clock. The second clock generator includes a second voltage controlled oscillator (VCO) and is configured to generate a third clock on the basis of the serial data. The sampling circuit is configured to sample reception data on the basis of the third clock and the serial data.

A semiconductor package for skew matching in a die-to-die interface, including: a first die; a second die aligned with the first die such that each connection point of a first plurality of connection points of the first die is substantially equidistant to a corresponding connection point of a second plurality of connection points of the second die; and a plurality of connection paths of a substantially same length, wherein each connection path of the plurality of connection paths couples a respective connection point of the first plurality of connection points to the corresponding connection point of the second plurality of connection points.

A method of transmitting universal serial bus (USB) frames over a communications channel is disclosed. A USB device receives one or more USB frames from a host device via a network, wherein the one or more USB frames are encapsulated in one or more data packets based on a communications protocol associated with the network. The USB device further synchronizes a local clock signal with a clock signal of the host device using a clock synchronization mechanism of the communications protocol. The USB device then determines a number of USB frames transmitted by the host device and processes the one or more USB frames based, at least in part, on the synchronized local clock signal. For some embodiments, the USB device may receive a frame count value and a corresponding media time value from the host device.

A handshake protocol circuit, a chip and a computer device. In the present handshake protocol circuit, according to level signals of a first protocol signal input end, a first protocol signal output end, a second protocol signal input end and a second protocol signal output end, a control circuit controls a data storage circuit to store and output operation data, which is equivalent to caching the operation data by the storage circuit. Therefore, when the number of functional module circuits is relatively large, the continuity of combination logic of handshake protocols between the module circuits is relatively reduced, thereby relatively ensuring the normal communication of data between the functional module circuits. In addition, the present disclosure further provides a handshake protocol chip and a computer device.

In one example, a host device may identify a serial device connected to the host device to determine a host action. The host device may receive a serial device signal with a child serial device identifier from a serial device bridge. The host device may identify a child serial device based on the child serial device identifier. The host device may execute a host action based on the child serial device.

Systems, methods, and apparatus for line multiplexed serial interfaces are disclosed. A method performed by a transmitting device includes asserting a stop condition on a wire of a serial data link by driving the wire to a first voltage level for a first period of time that is less than a duration of the stop condition, monitoring the wire after the first period of time, determining that flow-control has been asserted when the wire remains at a second voltage level for a second period of time that exceeds a minimum period of time defined for flow-control pulses and after the first period of time has elapsed, refraining from transmitting data on the wire while flow-control is asserted, and transmitting data on the wire when flow-control is de-asserted.

A semiconductor device is described herein. In accordance with one exemplary embodiment the semiconductor device includes a chip package, which includes at least one semiconductor chip, a dedicated ground pin, a first supply pin for receiving a first supply voltage, a second supply pin for receiving a second supply voltage, and a first input pin. The semiconductor device further includes a first circuit integrated in the semiconductor chip, wherein the first circuit is coupled to the first supply pin and to the ground pin, and a second circuit integrated in the semiconductor chip, wherein the second circuit is coupled to the first supply pin and to a virtual ground node. An electronic switch is configured to connect the virtual ground node with the first input pin dependent on the level of a first input signal.