Examples herein describe hardware architecture for processing and accelerating data passing through layers of a neural network. In one embodiment, a reconfigurable integrated circuit (IC) for use with a neural network includes a digital processing engine (DPE) array, each DPE having a plurality of neural network units (NNUs). Each DPE generates different output data based on the currently processing layer of the neural network, with the NNUs parallel processing different input data sets. The reconfigurable IC also includes a plurality of ping-pong buffers designed to alternate storing and processing data for the layers of the neural network.

A method for execution in a storage network, the method begins by determining a user device group content preference, wherein the user group content includes target content for a user device group and the determining includes predicting future target content for the user group. The method continues by selecting a plurality of network edge units for staging encoded data slices, identifying target content for partial download to the plurality of network edge units and dispersed error encoding the target content to generate a set of encoded data slices. The method then continues by identifying encoded data slices from the set of encoded data slices corresponding to the target content for partial download and determining a partial downloading schedule for sending the encoded data slices for partial download to each network edge unit of the plurality of network edge units. The method continues by facilitating partial downloading of the target content by sending the encoded data slices for partial download to each network edge unit of the plurality of network edge units.

Methods for balancing storage data traffic in a system in which at least one computing device (server) coupled to a converged network accesses at least one storage device coupled (by at least one adapter) to the network, systems configured to perform such methods, and devices configured to implement such methods or for use in such systems. Typically, the system includes servers and adapters, and server agents implemented on the servers and adapter agents implemented on the adapters are configured to detect and respond to imbalances in storage and data traffic in the network, and to redirect the storage data traffic to reduce the imbalances and, thereby to improve the overall network performance (for both data communications and storage traffic). Typically, each agent operates autonomously (except in that an adapter agent may respond to a request or notification from a server agent), and no central computer or manager directs operation of the agents.

An information processing device having a processor and memory, and including one or more accelerators and one or more storage devices, wherein: the information processing device has one network for connecting the processor, the accelerators, and the storage devices; the storage devices have an initialization interface for accepting an initialization instruction from the processor, and an I/O issuance interface for issuing an I/O command; and the processor notifies the accelerators of the address of the initialization interface or the address of the I/O issuance interface.

Snapshots are processed without holding all write operations while the snapshots are being activated. Rather than holding all write operations until snapshots are activated, write operations may be allowed to proceed. Snapshot write processing may be temporarily suspended while the snapshots are being activated, including snapshot metadata being updated, while write operations received while the snapshots are being activated are logged. After snapshots have been activated for all logical LSUs for which snapshots were instructed to be activated, the logging of write operations may be stopped, and the logged write entries processed to determine whether any of the logged write operations require updating snapshot information of any logical storage elements (LSEs) of the LSUs. While the logged write operations are being processed, any write operations received from a host for an LSE having a logged write operation may be held until the held operation, or all held operations are processed.

Local management of data stream throttling in data movement operations, such as secondary-copy operations in a storage management system, is disclosed. A local throttling manager may interoperate with co-resident data agents and/or a media agent executing on any given local computing device, whether a client computing device or a secondary storage computing device. The local throttling manager may allocate and manage the available bandwidth for various jobs and their constituent data streams—across the data agents and/or media agent. Bandwidth is allocated and re-allocated to data streams used by ongoing jobs, in response to new jobs starting and old jobs completing, without having to pause and restart ongoing jobs to accommodate bandwidth adjustments. The illustrative embodiment also provides local users with a measure of control over data streams—to suspend, pause, and/or resume them—independently from the centralized storage manager that manages the overall storage system.

A memory sub-system configured to dynamically determine input/output sizes of write commands based on a media physical layout of a memory sub-system. The memory sub-system can identify, dynamically in response to write commands being selected for execution in media units of the memory sub-system, a portion of a media layout that maps from logical addresses identified by the write commands in the logical address space to physical addresses of memory units in the media units. Based on the media layout, an input/output size for a next write command is identified and transmitted to the host system in a response. The host system generates the next write command and configures the amount of data to be written through the next write command based on based on the input/output size identified in the response.

The present invention provides a data loading method. The method comprises: reading data from an initial address in a memory; obtaining a frame header identifier, loading a valid data segment comprising the frame header identifier; verifying the valid data segment; when it is determined that the verification is successful, sending at least part of information within the valid data segment to a cache unit; updating a register according to at least part of the information by the cache unit. Using a specific frame header identifier, loading data in the memory starts only from the specific frame header identifier, which skips the data before the frame header identifier and avoids loading invalid data in the cache unit, thus saving time, preventing lengthy program, and being more scientific and convenient.

A processing device, operatively coupled with the memory device, is configured to provide a plurality of functions for accessing the memory device, wherein a function of the plurality of function receives input/output (I/O) operations from a host computing system. The processing device further determines a quality of service level of each function of the plurality of functions, and assigns to each function of the plurality of functions a corresponding function weight based on a corresponding quality of service level. The processing device also selects, for execution, a subset of the I/O operations, the subset comprising a number of I/O operations received at each function of the plurality of functions, wherein the number of I/O operations is determined according to the corresponding function weight of each function. The processing logic then executes the subset of I/O operations at the memory device.

Techniques are provided for operating a memory package and more specifically to increasing bandwidth of a system having stacked memory. In an example, a system can include a storage device having a first type of volatile memory and a second type of volatile memory, and a host device coupled to the storage device. The host device can issue commands to the storage device to store and retrieve information of the system. The host device can include a memory map of the storage device and latency information associated with each command of the commands. The host can sort and schedule pending commands according to the latency information and can intermix commands for the first type of volatile memory and commands for the second type of volatile memory to maintain a high utilization or efficiency of a data interface between the host device and the storage device.