Disclosed herein are techniques for managing context information for data stored within a non-volatile memory of a computing device. According to some embodiments, the method can include (1) loading, into a volatile memory of the computing device, the context information from the non-volatile memory, where the context information is separated into a plurality of silos, (2) writing transactions into a log stored within the non-volatile memory, and (3) each time a condition is satisfied: (i) identifying a next silo of the plurality of silos to be written into the non-volatile memory, (ii) updating the next silo to reflect the transactions that apply to the next silo, and (iii) writing the next silo into the non-volatile memory. In turn, when an inadvertent shutdown of the computing device occurs, the silos of which the context information is comprised can be sequentially accessed and restored in an efficient manner.

Technologies are provided to ensure integrity of erasure coded data that is subject to read and write access from distributed processes. Multiple processes that access erasure coded data can be coordinated in an efficient, scalable and fault-tolerant manner so that integrity of the original data is maintained. The Technologies include a fault-tolerant access coordination protocol that ensures exclusive write access by a client. The coordination protocol achieves scalability by not relying on centralized components, and achieves efficiency and performance by piggy-packing access coordination messages on operations of the underlying erasure coding protocol.

According to one embodiment, a storage device includes a nonvolatile memory and a controller. The controller is configured to read data from the nonvolatile memory by applying a read voltage to the nonvolatile memory. The controller is configured to correct the read voltage based on a difference between a measured value of a bit number obtained when the data is read from the nonvolatile memory by applying the read voltage to the nonvolatile memory and an expected value of the bit number.

In a method disclosed for writing data, a device receives data, divides the data into one or more data fragments, obtains a first parity fragment based on the one or more data fragments and a second parity fragment of a written data fragment in a stripe distributed across a plurality of nodes, stores the one or more data fragments and the first parity fragment in the stripe.

A method for synchronous replication of stream data includes receiving a stream of data blocks for storage at a first storage location associated with a first geographical region and at a second storage location associated with a second geographical region. The method also includes synchronously writing the stream of data blocks to the first storage location and to the second storage location. While synchronously writing the stream of data blocks, the method includes determining an unrecoverable failure at the second storage location. The method also includes determining a failure point in the writing of the stream of data blocks that demarcates data blocks that were successfully written and not successfully written to the second storage location. The method also includes synchronously writing, starting at the failure point, the stream of data blocks to the first storage location and to a third storage location associated with a third geographical region.

A method for execution by a dispersed storage network (DSN) managing unit includes receiving access information from a plurality of distributed storage and task (DST) processing units via a network. Cache memory utilization data is generated based on the access information. Configuration instructions are generated for transmission via the network to the plurality of DST processing units based on the cache memory utilization data.

A system and method for logging state data from a power system control device on a computer system is disclosed. The computer system includes a power system supplying power to the computer system. The power system has a power-up sequence having a plurality of stages. The power system control device is coupled to the power system. The power system control device includes a finite state machine circuit having states corresponding to the stages of the power-up sequence. The control device also has a write controller, a storage buffer, and a communication interface. The write controller writes the state of the finite state machine circuit in the storage buffer. An external controller is coupled to the communication interface and is operable to read the stored state data.

The present disclosure relates to method for checking the reading phase of a non-volatile memory device including at least an array of memory cells and with associated decoding and sensing circuitry and a memory controller, the method comprises: storing in a dummy row associated to said memory block at least internal block variables and a known pattern; performing a reading of said dummy row; comparing a result of the reading with the known pattern; trimming the parameters of the reading and/or swapping the used memory block based on the result of the comparing.

A data access method performed by a processing device is disclosed. The processing device manages a storage device based on a log-structured file system (LFS), where the processing device writes a target file to the storage device based on an out place update (OPU) mechanism; and the processing device writes file attribute information corresponding to the target file in the storage device to out of band (OOB) data of the storage device, to restore, after abnormal power-off, access to the target file by using the file attribute information stored in the OOB data. In this way, when writing the target file to the storage device, the processing device may write a file attribute corresponding to the target file to the OOB data, so that after abnormal power-off, access to the target file may be restored by using the file attribute information.

An apparatus which includes a first solid state drive (SSD) located on an SSD card having a fixed capacity and a first form factor. The apparatus can further include an adapter located on the SSD card to accommodate a second SSD. The second SSD has a second form factor that is different than the first form factor and is removeable from the SSD card. The apparatus can further include a controller located on the SSD card and configured to access the first SSD and the second SSD.