A signal generator, system, and method for electromagnetically heating of a hydrocarbon formation. The method involves determining a desired output signal having a desired power spectral density; generating a plurality of source signals, based on the desired output signal; modulating the plurality of source signals, based on the desired output signal, to provide a plurality of modulated signals capable of providing the desired power spectral density; combining one or more of the plurality of modulated signals into a combined signal; transforming the combined signal to have the desired power spectral density, thereby providing at least one output signal; and applying the at least one output signal to a load having a frequency-dependent impedance to produce at least one standing electromagnetic wave along a length of the load. The at least one standing electromagnetic wave includes at least a partial standing electromagnetic wave.

The present invention is directed to a frequency synthesizer with an improved architecture that eliminates a VCO and a method to build frequency synthesizers for generating high-frequency signals with low phase noise, low spurious, extremely fast switching speed and fine frequency resolution. The synthesizer provides significant improvement in performance, phase noise, switching speed, power, size and cost reduction.

A frequency synthesizer includes a clock multiplier unit configured to receive a first clock and output a second clock in accordance with a multiplication factor; a divide-by-three circuit configured to receive the second clock and output a third clock; a first divide-by-two circuit configured to receive the second clock and output a fourth clock; a second divide-by-two circuit configured to receive the fourth clock and output a fifth clock; a first multiplexer configured to receive the third clock and the fourth clock and output a seventh clock in accordance with a first selection signal; a second multiplexer configured to receive the third clock and the fifth clock and output an eighth clock in accordance with a second selection signal; and a mixer configured to receive the seventh clock and the eighth clock and output an output clock.

A clock multiplexer device includes first and second control circuitries and an output circuitry. The first control circuitry generates a first enable signal and a first signal according to a first clock signal and a first selection signal, and determines whether to output the first signal to be a first output clock signal according to a second selection signal and a second enable signal. The first and the second selection signals have opposite logic values. The second control circuitry generates the second enable signal and a second signal according to a second clock signal and the second selection signal, and determines whether to output the second signal to be a second output clock signal according to the first selection signal and the first enable signal. The output circuitry outputs one of the first output clock signal and the second output clock signal to be a final clock signal.

Aspects of the disclosure relate to a local oscillator frequency divider for a receiver or transmitter. In this regard a frequency divider has a first frequency input coupled to a first oscillator frequency output, a second frequency input coupled to a complementary second oscillator frequency output, a first in-phase/quadrature (I/Q) divided frequency output, and a complementary second I/Q divided frequency output. The frequency divider further has a first alternating current (AC) coupling capacitor between the first frequency input and the first oscillator frequency output and a second AC coupling capacitor between the second frequency input and the second oscillator frequency output.

A device for generating first clock signals includes first circuits, each including a ring oscillator delivering one of the first clock signals and being connected to a first node configured to receive a first current. A circuit selects one the first clock signals, and a phase-locked loop delivers a second signal which is a function of a difference between a frequency of the first selected clock signal and a set point frequency. Each first circuit supplies the first node with a compensation current determined by the second signal, when this first circuit delivers the selected clock signal and operates in controlled mode.

Disclosed herein are a frequency generator, which is provided with a frequency automatic correction function and is capable of reducing a frequency test time and a correction time, and a method of correcting a frequency thereof. The frequency generator includes an oscillator configured to generate an output frequency signal according to a frequency control signal, and a frequency corrector configured to generate the frequency control signal for controlling the output frequency of the oscillator using a reference frequency signal.

A frequency generator for generating a controlled signal having a controlled frequency uses a frequency ratio generator with an input; a frequency divider for dividing the controlled frequency by a frequency ratio signal to generate a divided signal having a divided frequency; a converter for generating an excitation signal having the divided frequency, the excitation signal exciting a resonator for generating a resonance signal having a resonance frequency; a frequency phase detector of a phase difference between the divided frequency and the resonance frequency; an inner loop filter for generating the frequency ratio signal and filtering the phase difference signal to prevent instability of two frequency ratio generator loops; an output configured for providing the frequency ratio signal based on a ratio between the controlled frequency and the resonance frequency; and a controlled oscillator circuit for generating the controlled signal based on comparison of the frequency ratio with a target ratio.

Techniques for controlling a power converter with a control signal and circuitry configured to translate the control signal into one or more pulse modulated drive signal(s) to operate the power converter. The translation circuitry may receive the control signal, extract frequency information, duty cycle, dead time, and other information from the control signal, and output at least one pulse modulated drive signal, based on the extracted information, to a driving stage that may operate the power converter. The control signal may be a digital signal that includes rising edges and falling edges. The edges of the first type may define the frequency information. The edges of the second type may define other information extracted by the translation circuitry, e.g., duty cycle, dead time and so on. In some examples the power converter may be a resonant power converter.

In an embodiment, a circuit for tripling frequency is configured to receive an input voltage (V.sub.in) having a sinusoidal shape and a base frequency. The circuit has a first and a second transistor pair that are cross-coupled, and a trans-characteristics f(V.sub.in) approximating a polynomial nominal trans-characteristic given by

[00001]$f\left(V_{in}\right)=\left(\frac{3}{A}{V}_{in}-\frac{4}{A^3}{V}_{in}^3\right)g_m$

where A represents an amplitude of the input voltage and g.sub.m is a transconductance of transistors of the first and second transistor pairs.