A multilayer fringe capacitor includes first and second interdigitated capacitor electrodes, both parallel to and intersecting a first planar surface; third and fourth interdigitated capacitor electrodes, the first and second electrodes parallel to and separated by a non-zero distance from the third and fourth electrodes; a first set of coupling vias that electrically couples the first electrode to the third electrode; and a second set of coupling vias that electrically couples the second electrode to the fourth electrode.

A novel metallized film capacitor is contemplated. The capacitor includes a first film and a second film. Each of the first film and second film have a metallized layer added. Each of the metallized layers includes alternating metallized sections and margin sections. The outermost sections on one film are metallized sections, while the outermost sections on the other film are margin sections. This pattern and proper sizing of the sections creates overlap regions where a metallized section from one film overlaps a metallized section from the other film. These overlap regions create sub-capacitors that give the capacitor low inductance while allowing for high current and high voltage.

A novel metallized film capacitor is contemplated. The capacitor includes a first film and a second film. Each of the first film and second film have a metallized layer added. Each of the metallized layers includes alternating metallized sections and margin sections. The outermost sections on one film are metallized sections, while the outermost sections on the other film are margin sections. This pattern and proper sizing of the sections creates overlap regions where a metallized section from one film overlaps a metallized section from the other film. These overlap regions create sub-capacitors that give the capacitor low inductance while allowing for high current and high voltage.

A semiconductor device and a method of forming the same are disclosed. The method includes receiving a semiconductor substrate and a fin extending from the semiconductor substrate; forming multiple dielectric layers conformally covering the fin, the multiple dielectric layers including a first charged dielectric layer having net fixed first-type charges and a second charged dielectric layer having net fixed second-type charges, the second-type charges being opposite to the first-type charges, the first-type charges having a first sheet density and the second-type charges having a second sheet density, the first charged dielectric layer being interposed between the fin and the second charged dielectric layer; patterning the multiple dielectric layers, thereby exposing a first portion of the fin, wherein a second portion of the fin is surrounded by at least a portion of the first charged dielectric layer; and forming a gate structure engaging the first portion of the fin.

Provided are a multilayered capacitor and a manufacturing method thereof, the multilayered capacitor including a capacitor body including a dielectric layer and an internal electrode, and an external electrode outside the capacitor body, wherein the dielectric layer includes a plurality of dielectric grains, at least one of the plurality of dielectric grains has a core-shell structure, and in the dielectric grains having the core-shell structure, a ratio of a diameter of the core to a diameter of the dielectric grain having the core-shell structure is about 60% to about 80%.

A semiconductor structure including the following components is provided. A first capacitor structure includes first, second, and third electrode layers and first and second dielectric layers. The second electrode layer is disposed on the first electrode layer. The top-view pattern of the second electrode layer partially overlaps the top-view pattern of the first electrode layer to have a first overlapping region. The third electrode layer is disposed on the second electrode layer. The top-view pattern of the third electrode layer partially overlaps the top-view pattern of the second electrode layer to have a second overlapping region. The first overlapping region and the second overlapping region have the same top-view area. The first dielectric layer is disposed between the first electrode layer and the second electrode layer. The second dielectric layer is disposed between the second electrode layer and the third electrode layer.

A semiconductor structure including the following components is provided. A first capacitor structure includes first, second, and third electrode layers and first and second dielectric layers. The second electrode layer is disposed on the first electrode layer. The top-view pattern of the second electrode layer partially overlaps the top-view pattern of the first electrode layer to have a first overlapping region. The third electrode layer is disposed on the second electrode layer. The top-view pattern of the third electrode layer partially overlaps the top-view pattern of the second electrode layer to have a second overlapping region. The first overlapping region and the second overlapping region have the same top-view area. The first dielectric layer is disposed between the first electrode layer and the second electrode layer. The second dielectric layer is disposed between the second electrode layer and the third electrode layer.

A capacitance sensor includes flexible interdigitated electrodes and an uncomplicated, compact control circuit including a frequency meter, a resistance capacitance oscillator, a display, and a microcontroller to manage these components. In an exemplary method of use of the capacitance sensor to monitor known parameters of a fluid, the flexible electrodes may be inserted into a circular tubular conduit containing the fluid. As fluid flows past the electrodes, any discrepancies from the known parameters may be detected and signaled immediately.

A capacitance sensor includes flexible interdigitated electrodes and an uncomplicated, compact control circuit including a frequency meter, a resistance capacitance oscillator, a display, and a microcontroller to manage these components. In an exemplary method of use of the capacitance sensor to monitor known parameters of a fluid, the flexible electrodes may be inserted into a circular tubular conduit containing the fluid. As fluid flows past the electrodes, any discrepancies from the known parameters may be detected and signaled immediately.

A thin-film capacitor including a stacked body having a lower electrode layer, a plurality of dielectric layers stacked on the lower electrode layer, one or more internal electrode layers interposed between the dielectric layers, and an upper electrode layer that is stacked on the opposite side of the lower electrode layer with the dielectric layers and the internal electrode layers interposed between, and a cover layer that covers the stacked body. The stacked body includes opening portions that have the lower electrode layer, opens upward in a stacking direction, and has a side surface formed to include an inclined surface. The cover layer is stacked on the inclined surface of the stacked body. A curved surface with a predetermined shape is formed on the inclined surface for each pair of layers including the dielectric layer forming the inclined surface and the electrode layer, forming the inclined surface.