A semiconductor device and a method of forming the same are disclosed. The method includes receiving a semiconductor substrate and a fin extending from the semiconductor substrate; forming multiple dielectric layers conformally covering the fin, the multiple dielectric layers including a first charged dielectric layer having net fixed first-type charges and a second charged dielectric layer having net fixed second-type charges, the second-type charges being opposite to the first-type charges, the first-type charges having a first sheet density and the second-type charges having a second sheet density, the first charged dielectric layer being interposed between the fin and the second charged dielectric layer; patterning the multiple dielectric layers, thereby exposing a first portion of the fin, wherein a second portion of the fin is surrounded by at least a portion of the first charged dielectric layer; and forming a gate structure engaging the first portion of the fin.

A semiconductor device and a method of forming the same are disclosed. The semiconductor device includes a semiconductor substrate; a fin extending from the semiconductor substrate; a first charged dielectric layer covering a bottom portion of the fin, the first charged dielectric layer having net fixed first-type charges; a second charged dielectric layer covering the first charged dielectric layer, the second charged dielectric layer having net fixed second-type charges, the second-type charges being opposite to the first-type charges; and a gate structure engaging a top portion of the fin.

An example power generation system includes two capacitors and an electric load. A first capacitor includes a dielectric material that is configured to transition from a ferroelectric phase to a paraelectric or antiferroelectric phase when heated above a first transition temperature, and to transition from the paraelectric or antiferroelectric phase to the ferroelectric phase when cooled below a second transition temperature. A second capacitor is electrically coupled in parallel to the first capacitor. The electric load is electrically coupled to the first capacitor and the second capacitor. The system is configured to cyclically cool the dielectric material below the second transition temperature to draw a charge from the second capacitor to the first capacitors through the electric load, and heat the dielectric material beyond the first transition temperature to draw a charge from the first capacitor to the second capacitors through the electric load.

A circuit module includes a first and second monolithic ceramic capacitors encapsulated by a mold resin layer on a wiring board. The first and second monolithic ceramic capacitors are lined up along a direction parallel or substantially parallel to the main surface of the wiring board and are electrically connected in series or in parallel through a conductive pattern provided on the wiring board. One of a pair of end surfaces of the first monolithic ceramic capacitor is opposed to one of the width-direction side surfaces as a pair of side surfaces of the second monolithic ceramic capacitor with the mold resin layer interposed.

A circuit module includes a first and second monolithic ceramic capacitors encapsulated by a mold resin layer on a wiring board. The first and second monolithic ceramic capacitors are lined up along a direction parallel or substantially parallel to the main surface of the wiring board and are electrically connected in series or in parallel through a conductive pattern provided on the wiring board. One of a pair of end surfaces of the first monolithic ceramic capacitor is opposed to one of the width-direction side surfaces as a pair of side surfaces of the second monolithic ceramic capacitor with the mold resin layer interposed.

A device and its method of manufacture, the device configured for providing electrical energy storage of high specific energy density. The device contains one or more layers of high dielectric constant material, such as Barium Titanate or Hexagonal Barium Titanate, sandwiched between electrode layers made up of one or more of a variety of possible conducting materials. The device includes one or more electrically insulating layers including carbon, such as carbon formed into diamond or a diamond-like arrangement, for insulating the electrode(s) from the dielectric layer(s) to provide for very high breakdown voltages with good heat conductivity. The layers can be created by a variety of methods including laser deposition, and assembled to form a capacitor device provides the high energy density storage.

An on-vehicle circuit unit includes a first conductor that is a power supply line, a second conductor that is a ground line a dielectric that is disposed between the first conductor and the second conductor.

An on-vehicle circuit unit includes a first conductor that is a power supply line, a second conductor that is a ground line a dielectric that is disposed between the first conductor and the second conductor.

A capacitor includes a body including a plurality of dielectric layers and internal electrodes which are alternately stacked, and a compensation region formed in the interior of the body, the compensation region including portions of the plurality of dielectric layers and including a central portion and an end portion extended from the central portion. A thickness of the central portion of the compensation region is between 4 and 13 times as great as that of a dielectric layer among the plurality of dielectric layers on which the internal electrodes are formed.

A capacitor includes a body including a plurality of dielectric layers and internal electrodes which are alternately stacked, and a compensation region formed in the interior of the body, the compensation region including portions of the plurality of dielectric layers and including a central portion and an end portion extended from the central portion. A thickness of the central portion of the compensation region is between 4 and 13 times as great as that of a dielectric layer among the plurality of dielectric layers on which the internal electrodes are formed.