A capacitor structure includes a first comb-shaped electrode, a second comb-shaped electrode, a bottom electrode, an insulator layer, and a top electrode. The first comb-shaped electrode has a first pad and first fingers connecting to the first pad. The second comb-shaped electrode has a second pad and second fingers connecting to the first pad, wherein one of the second fingers is disposed between two adjacent first fingers. The bottom electrode includes a first portion, a second portion and a third portion which are spaced apart, wherein the first portion and the third portion are electrically coupled to the first comb-shaped electrode and the second comb-shaped electrode, respectively. The insulator layer is disposed over the bottom electrode. The top electrode is disposed over the insulator layer.

A capacitor that includes a lower common electrode having a first region and a second region, a first upper electrode opposing the first region, a first dielectric layer between the first region and the first upper electrode, a second upper electrode located in a layer in which the first upper electrode is located and opposing the second region, a second dielectric layer between the second region and the second upper electrode, a first connection electrode electrically connected to the first upper electrode, a second connection electrode located in a layer in which the first connection electrode is located and electrically connected to the second upper electrode, and auxiliary electrodes located in a layer different from a layer in which the lower common electrode is located and that connect the first region and the second region of the lower common electrode.

A capacitor that includes a lower common electrode having a first region and a second region, a first upper electrode opposing the first region, a first dielectric layer between the first region and the first upper electrode, a second upper electrode located in a layer in which the first upper electrode is located and opposing the second region, a second dielectric layer between the second region and the second upper electrode, a first connection electrode electrically connected to the first upper electrode, a second connection electrode located in a layer in which the first connection electrode is located and electrically connected to the second upper electrode, and auxiliary electrodes located in a layer different from a layer in which the lower common electrode is located and that connect the first region and the second region of the lower common electrode.

A multilayer fringe capacitor includes first and second interdigitated capacitor electrodes, both parallel to and intersecting a first planar surface; third and fourth interdigitated capacitor electrodes, the first and second electrodes parallel to and separated by a non-zero distance from the third and fourth electrodes; a first set of coupling vias that electrically couples the first electrode to the third electrode; and a second set of coupling vias that electrically couples the second electrode to the fourth electrode.

A circuit module includes a first and second monolithic ceramic capacitors encapsulated by a mold resin layer on a wiring board. The first and second monolithic ceramic capacitors are lined up along a direction parallel or substantially parallel to the main surface of the wiring board and are electrically connected in series or in parallel through a conductive pattern provided on the wiring board. One of a pair of end surfaces of the first monolithic ceramic capacitor is opposed to one of the width-direction side surfaces as a pair of side surfaces of the second monolithic ceramic capacitor with the mold resin layer interposed.

A circuit module includes a first and second monolithic ceramic capacitors encapsulated by a mold resin layer on a wiring board. The first and second monolithic ceramic capacitors are lined up along a direction parallel or substantially parallel to the main surface of the wiring board and are electrically connected in series or in parallel through a conductive pattern provided on the wiring board. One of a pair of end surfaces of the first monolithic ceramic capacitor is opposed to one of the width-direction side surfaces as a pair of side surfaces of the second monolithic ceramic capacitor with the mold resin layer interposed.

An energy storage device comprises a capacitor having a dielectric between opposite electrodes and a nonconductive coating between at least one electrode and the dielectric. The nonconductive coating allows for much higher voltages to be employed than in traditional EDLCs, which significantly increases energy stored in the capacitor. Viscosity of the dielectric material may be increased or decreased in a controlled manner, such as in response to an applied external stimulus, to control discharge and storage for extended periods of time.

An energy storage device comprises a capacitor having a dielectric between opposite electrodes and a nonconductive coating between at least one electrode and the dielectric. The nonconductive coating allows for much higher voltages to be employed than in traditional EDLCs, which significantly increases energy stored in the capacitor. Viscosity of the dielectric material may be increased or decreased in a controlled manner, such as in response to an applied external stimulus, to control discharge and storage for extended periods of time.

One aspect is contemplated for providing a device having a liquid crystal material exhibiting a dielectric constant of 1000 or more at a temperature at which a specific liquid crystal phase is developed, and a unit configured to apply voltage to the liquid crystal material at the temperature at which the specific liquid crystal phase is developed.

A passive radiofrequency microelectronic components for an integrated circuit which includes a dielectric substrate and at least one metal conductive layer positioned on said substrate. The conductive layer including at least one first metal conductive portion and a second metal conductive portion separated by an insulation. A microelectronic component according to the invention includes at least one graphene layer positioned so that a radiofrequency or hyperfrequency signal crosses said at least one graphene layer when it is transmitted between said first metal conductive portion and said second metal conductive portion, said graphene layer being able, when it is subject to an electric potential, to transmit said radiofrequency or hyperfrequency signal along a first direction and to attenuate said radiofrequency or hyperfrequency signal along a second direction opposite to said first direction.