A composite film having a high dielectric permittivity engineered particles dispersed in a high breakdown strength polymer material to achieve high energy density.

A ceramic capacitor which is low in ESL and suitable for being built into a substrate includes a first external electrode, a second external electrode and a third external electrode. Each of the first, second and third external electrodes include a sputtering electrode film. Each of the outermost layers of the first, second and third external electrodes contains Cu.

A ceramic capacitor that has low ESL and is suitable to be built into a substrate includes a first external electrode including a first portion extending from a portion located on a first principal surface to a portion of a first end surface, a second portion extending from a portion located on a second principal surface to a portion of the first end surface, a third portion extending from a portion located on a first side surface to a portion of the first end surface, and a fourth portion extending from a portion located on a second side surface to a portion of the first end surface. The first external electrode includes an outermost layer that is a Cu plated layer.

In a ceramic capacitor which is low in ESL and suitable to be built into a substrate, widths of portions of a third external electrode on first and second principal surfaces in a length direction are A, widths of portions of the third external electrode on first and second side surfaces in the length direction are B, A>B is satisfied, and widths of portions of first and second external electrodes on the first and second principal surfaces in the length direction are C, widths of portions of the first and second external electrodes on the first and second side surfaces in the length direction are denoted by D, C>D is satisfied.

A ceramic capacitor which is low in ESL and suitable for being built into a substrate has a dimension in a length direction of a lowermost surface of a third external electrode which is in contact with a capacitor main body denoted by e1 and a dimension in the length direction of the uppermost surface of the third external electrode denoted by e2, and a relationship of e1<e2 is satisfied.

In a planar view of a ceramic capacitor that has low ESL and is embeddable into a substrate, lengths of first and second external electrodes are L1, lengths from portions of the first and second external electrodes farthest from a capacitor main body to portions closer to the capacitor main body by about 40% of a thickness of the first or second external electrode in a laminating direction are L2, a ratio L2/L1 is about 80% or more and about 90% or less. In the planar view, a length of a third external electrode is L3, a length from a portion of the third external electrode farthest from the capacitor main body to a portion closer to the capacitor main body by about 40% of a thickness of the third external electrode in the laminating direction is L4, a ratio L4/L3 is about 80% or more.

Disclosed herein a thin film capacitor that includes a lower electrode layer, an upper electrode layer, and a dielectric layer disposed between the lower electrode layer and the upper electrode layer. The dielectric layer has a through hole. An inner wall surface of the through hole has a first tapered surface and a second tapered surface surrounded by the first tapered surface. The first and second tapered surfaces are not covered with the upper electrode layer and have respective first and second taper angles with respect to a surface of the lower electrode layer. The second taper angle is smaller than the first taper angle.

A thin film capacitor comprises: a laminated body that has a base electrode, a dielectric layer and an upper electrode layer; a protective layer covering the base electrode, the dielectric layer and the upper electrode layer, and includes a first through-hole that reaches the base electrode, and a second through-hole that reaches the upper electrode layer; a first extraction electrode in the first through-hole and electrically connected with the base electrode; a second extraction electrode in the second through-hole and electrically connected with the upper electrode layer; a first terminal electrode on the protective layer, and connected with the base electrode through the first extraction electrode; and a second terminal electrode on the protective layer, and connected with the upper electrode layer through the second extraction electrode. Young's modulus of the protective layer is equal to or higher than 0.1 GPa and equal to or lower than 2.0 GPa.

A multilayer capacitor includes a pair of external electrodes each having an end face portion; a first principal face extending portion; a second principal face extending portion; a first side face extending portion; and a second side face extending portion. The pair of external electrodes each includes a base electrode and a metallic layer. The metallic layer includes a first metallic layer and a second metallic layer located outside the first metallic layer. An intermetallic compound layer is located outside the first metallic layer, and is exposed from the second metallic layer in a ridge portion lying between the end face portion and the first principal face extending portion, a ridge portion lying between the first side face extending portion and the first principal face extending portion, and a ridge portion lying between the second side face extending portion and the first principal face extending portion.

A thin film high polymer laminated capacitor includes: a laminated chip including dielectric layers, and internal electrode layers including first metal layers including a first metal vapor-deposited on the dielectric layers, and second metal layers including a second metal vapor-deposited on the first metal layers. The dielectric layers and the internal electrode layers being laminated and bonded alternately, and external electrodes formed on one end and the other end of the laminated chip. The laminated chip having a first region having the first metal layers formed on the dielectric layers, which are laminated alternately, and edge regions having the second metal layers formed on layers connected to the one end and layers connected to the other end in the first metal layers, which are laminated alternately, the first region having a capacitor function region, and the edge region having a heavy edge.