A multilayer ceramic capacitor (MLCC) includes: a ceramic body having a plurality of dielectric layers, first internal electrodes, and second internal electrodes; and a first external electrode and a second external electrode, disposed on an exterior of the ceramic body. A plurality of via electrodes are disposed in the ceramic body; a first via electrode connects the first internal electrodes to the first external electrode; a second via electrode connects the second internal electrodes to the second external electrode; and the plurality of via electrodes have a stepped shape, and a distance in a length direction from a first vertical edge of each step to a second vertical edge of each step in the plurality of via electrodes is increased in a direction from the substrate toward an upper portion of the ceramic body.

A thin film capacitor includes a body including a lower electrode formed on a substrate, a plurality of first electrode layers, and a plurality of second electrode layers stacked alternately with the plurality of first electrode layers, with one of the dielectric layers interposed therebetween. The lower electrode and the first electrode layer have the same polarity as each other, and surface roughness of the first and second electrode layers is less than that of the dielectric layers, thereby securing capacitance and characteristics of the dielectric layers.

A film capacitor includes a stacked body formed by stacking metalized films in each of which a metal electrode is formed on a surface of a dielectric film, at least one of the dielectric films containing a high thermal conductive filler; and external electrodes formed at electrode forming ends provided at opposed positions in the stacked body. The stacked body includes a high thermal conductive portion in which a content of the high thermal conductive filler in the at least one dielectric film is relatively high, and a low thermal conductive portion in which the content of the high thermal conductive filler in the at least one dielectric film is relatively low, or the high thermal conductive filler is not contained. The high thermal conductive portion is provided to continuously extend from an inside of the stacked body to a side portion other than the electrode forming ends.

Provided is a manufacturing method of a thin film capacitor comprising a capacitance portion in which at least one dielectric layer is sandwiched between a pair of electrode layers included in a plurality of electrode layers, the manufacturing method including a lamination process of alternately laminating the plurality of electrode layers and a dielectric film and forming a laminated body which will be the capacitance portion, a first etching process of forming an opening extending in a laminating direction with respect to the laminated body and exposing the dielectric film laminated directly on one of the plurality of electrode layers on a bottom surface of the opening, and a second etching process of exposing the one electrode layer at the bottom surface of the opening. In the second etching process, an etching rate of the one electrode layer is lower than an etching rate of the dielectric film.

A multilayer capacitor includes a capacitor body including first to sixth surface, and including a plurality of dielectric layers, and first and second internal electrodes; and first and second external electrodes. The first and second internal electrodes include first and second capacitance forming portion, first and second lead-out portion extending from the first and second capacitance forming portion toward the third surface of the capacitor body and connected to the first and second external electrode, and first and second dot pattern portion formed in at least one corner of the first and second capacitance forming portion. The first dot pattern portion and the second dot pattern portion have dot patterns not overlapping each other in the first direction.

An integrated-circuit device having a layered structure including a plurality of wiring layers with a via layer sandwiched between adjacent wiring layers, wherein: a capacitor having first and second terminals is formed from conductive structures implemented in first and second wiring layers, the conductive structures including arrangements of conductive strips; the strips formed in the first wiring layer are organized into a first-terminal comb arrangement connected to the first terminal and a second-terminal comb arrangement connected to the second terminal, each of comb arrangements having a base strip and a plurality of finger strips extending from the base strip; and the strips formed in the second wiring layer include a plurality of separate strips which constitute finger strips of a cross-layer comb arrangement whose base strip is a finger strip of the first-terminal comb arrangement of the first wiring layer to which those separate strips are conductively connected by vias.

A thin film capacitor is provided with a lower electrode made of a metal foil containing many metal grains, a dielectric thin film formed on an upper surface of the lower electrode, and an upper electrode formed on an upper surface of the dielectric thin film. A lower surface of the lower electrode is an etched surface from which cross sections of the metal grains appear. The height difference between the cross sections of adjacent metal grains in the etched surface is 1 μm or more and 8 μm or less.

A capacitor unit and a manufacturing method thereof are provided. The manufacturing method includes the following steps. An isolation layer is formed on a substrate. A first capacitor stacked structure and a second capacitor stacked structure are formed on the isolation layer. Electrode connectors are formed on the first capacitor stacked structure and the second capacitor stacked structure. The electrode connectors are exposed, so that the electrode connectors, the first capacitor stacked structure, the second capacitor stacked structure, the isolation layer, and the substrate are combined to form a capacitor integrated structure, wherein the isolation layer electrically isolates the substrate from the first capacitor stacked structure and the second capacitor stacked structure. The capacitor integrated structure is cut to form a first capacitor unit and a second capacitor unit separated from each other.

A multilayer ceramic electronic component includes a ceramic body including first and second internal electrodes disposed to face each other and a dielectric layer interposed therebetween. When an average thickness of the dielectric layer is denoted as ‘td,’ an average thickness of the first and second internal electrodes is denoted as ‘te,’ and a standard deviation of thicknesses of an internal electrode, measured at a plurality of points in a predetermined region of the internal electrode, is denoted as ‘σte,’ a ratio of the standard deviation of thicknesses of the internal electrode to the average thickness of the dielectric layer, which is denoted as ‘σte/td,’ satisfies 0.12≤σte/td≤0.21.

Provided is a manufacturing method of a thin film capacitor comprising a capacitance portion in which at least one dielectric layer is sandwiched between a pair of electrode layers included in a plurality of electrode layers, the manufacturing method including a lamination process of alternately laminating the plurality of electrode layers and a dielectric film and forming a laminated body which will be the capacitance portion, a first etching process of forming an opening extending in a laminating direction with respect to the laminated body and exposing the dielectric film laminated directly on one of the plurality of electrode layers on a bottom surface of the opening, and a second etching process of exposing the one electrode layer at the bottom surface of the opening. In the second etching process, an etching rate of the one electrode layer is lower than an etching rate of the dielectric film.