Patent classifications
H01G4/385
ELECTRONIC COMPONENT AND METHOD FOR MANUFACTURING ELECTRONIC COMPONENT
An electronic component that includes an electronic component body including a first internal electrode exposed at a first end surface and a second internal electrode exposed at a second end surface; a first external electrode on the first end surface and a bottom surface of the electronic component body; and a second external electrode on the second end surface and the bottom surface of the electronic component body, wherein the first external electrode comprises a first end surface electrode and a first bottom surface electrode that are integrated, and a thickness of the first end surface electrode is smaller than a thickness of the first bottom surface electrode, and the second external electrode comprises a second end surface electrode and a second bottom surface electrode that are integrated, and a thickness of the second end surface electrode is smaller than a thickness of the second bottom surface electrode.
Capacitor with multiple elements for multiple replacement applications
A capacitor provides a plurality of selectable capacitance values, by selective connection of six capacitor sections of a capacitive element each having a capacitance value. The capacitor sections are provided in a plurality of wound cylindrical capacitive elements. Two vertically stacked wound cylindrical capacitance elements may each provide three capacitor sections. There may be six separately wound cylindrical capacitive elements each providing a capacitor section. The capacitor sections have a common element terminal.
DECOUPLING CAPACITORS BASED ON DUMMY THROUGH-SILICON-VIAS
Disclosed herein are IC structures with one or more decoupling capacitors based on dummy TSVs provided in a support structure. An example decoupling capacitor includes first and second capacitor electrodes and a capacitor insulator between them. The first capacitor electrode is a liner of a first electrically conductive material on sidewalls and a bottom of an opening in the support structure, the opening in the support structure extending from the second side towards, but not reaching, the second side. The capacitor insulator is a liner of a dielectric material on sidewalls and a bottom of the opening in the support structure lined with the first electrically conductive material. The second capacitor electrode is a second electrically conductive material filling at least a portion of the opening in the support structure lined with the first electrically conductive material and with the dielectric material.
Electrical capacitor bank
A capacitor bank that includes at least two capacitors wherein the capacitor bank is configured to change the quantity of phases of the input voltage within the capacitor bank. The capacitor bank of the preferred embodiment of the present invention includes a first capacitor and a second capacitor. The first capacitor and second capacitor are three phase capacitors each having three terminals configured to couple to an input voltage. The capacitor bank is wired so as to have a first source of an input voltage coupled to two terminals of the first capacitor and one terminal of the second capacitor. A second source of the input voltage is electrically coupled to one terminal of the first capacitor and two terminals of the second capacitor. The capacitor bank is operable to change the double phase input voltage into three phases within the capacitor bank.
ELECTRICAL DEVICE COMPRISING A 3D CAPACITOR AND A REGION SURROUNDED BY A THROUGH OPENING
An electrical device that includes a substrate; a 3D capacitor including a capacitor dielectric region of a dielectric material, a capacitor electrode region of a conductive material, the capacitor dielectric region and the capacitor electrode region being arranged at least partially inside a cavity extending in the substrate from a top face of the substrate; and a surrounding through opening in the substrate and which surrounds a surrounded substrate region, the 3D capacitor being outside of the surrounded substrate region, the surrounding through opening extending from the top face to a bottom face of the substrate, wherein inside the surrounding through opening a surrounding dielectric region of the dielectric material and a surrounding conductive region of the conductive material are arranged.
Electronic component and board having the same mounted thereon
An electronic component is provided, and the electronic component includes: a capacitor array in which a plurality of multilayer capacitors are stacked, the plurality of multilayer capacitors including a body, and first and second external electrodes; first and second metal frames including first and second support portions bonded to the first and second external electrodes of the capacitor array, first and second mounting portions located below the first and second external electrodes and having first and second protrusions protruding downwardly, and first and second connection portions connecting the first and second support portions to the first and second mounting portions, respectively; and a capsule portion encapsulating the capacitor array to expose the first mounting portion of the first metal frame and the second mounting portion of the second metal frame, and having a lower surface provided with a plurality of protruding portions are formed at predetermined intervals.
MULTI-LAYER CHIP CERAMIC DIELECTRIC CAPACITOR
Provided is a multi-layer chip ceramic dielectric capacitor, relating to the field of capacitor technologies. For the multi-layer chip ceramic dielectric capacitor provided in the present disclosure, first to fifth internal electrodes are reasonably arranged, and a first capacitance component, a second capacitance component, a third capacitance component and a fourth capacitance component are connected in series to form the capacitor, with the same capacitance, then according to the voltage division principle of capacitor, when each of the small capacitors connected in series bears a voltage of U0, the whole capacitor can withstand a voltage of 4U0. Therefore, the multi-layer chip ceramic dielectric capacitor, in a series structure, provided in the present disclosure can withstand higher direct current and radio-frequency voltages.
Chip component
A chip component includes a substrate that has a first surface and a second surface on a side opposite to the first surface, a plurality of wall portions that are formed on a side of the first surface by using a part of the substrate, that have one end portion and one other end portion, and that are formed of a plurality of pillar units, a support portion that is formed around the wall portions by using a part of the substrate and that is connected to at least one of the end portion and the other end portion of the wall portions, and a capacitor portion formed by following a surface of the wall portion, in which each of the pillar units includes a central portion and three convex portions that extend from the central portion in three mutually different directions in a plan view and in which the wall portion is formed by a connection between the convex portions of the pillar units that adjoin each other.
LC composite component
An LC composite component includes a non-magnetic substrate, a magnetic layer with magnetism, capacitors, inductors, and core parts with magnetism. The non-magnetic substrate includes a first surface and a second surface on a side opposite to the first surface. The magnetic layer is disposed to face the first surface of the non-magnetic substrate. The inductors and the capacitors are disposed between the first surface of the non-magnetic substrate and the magnetic layer. The core parts are disposed between the first surface of the non-magnetic substrate and the magnetic layer and connected to the magnetic layer. The thickness of the core parts is 1.0 or more times the thickness of the magnetic layer in a direction perpendicular to the first surface of the non-magnetic substrate, and each of the magnetic layer and the core parts contains magnetic metal particles and resin.
SEMICONDUCTOR DEVICE
A semiconductor device that includes a semiconductor substrate having a first main surface and a second main surface; a dielectric film on the first main surface, the dielectric film having an electrode layer disposing portion and a protective layer covering portion, and a thickness of the protective layer covering portion in a first outer peripheral end of the dielectric film is smaller than a thickness of the electrode layer disposing portion; a first electrode layer on the electrode layer disposing portion; a first protective layer covering a second outer peripheral end of the first electrode layer and at least a part of the protective layer covering portion; and a second protective layer covering the first protective layer, wherein the first protective layer has a relative permittivity lower than that of the second protective layer, and the second protective layer has moisture resistance higher than that of the first protective layer.