Implementations of semiconductor packages may include: a die coupled to a substrate; a housing coupled to the substrate and at least partially enclosing the die within a cavity of the housing, and; a pin fixedly coupled to the housing and electrically coupled with the die, wherein the pin includes a reversibly elastically deformable lower portion configured to compress to prevent a lower end of the pin from lowering beyond a predetermined point relative to the substrate when the housing is lowered to be coupled to the substrate.

This semiconductor device is provided with a device substrate in which a semiconductor circuit including two high frequency amplifiers; a cap substrate and a sealing frame of a conductor which forms and air-tightly seals space surrounding an area, in which the semiconductor circuit is formed, between the device substrate and the cap substrate, wherein the sealing frame is configured as a line of a 90-degree hybrid circuit or a line of a rat-race circuit.

This semiconductor device is provided with a device substrate in which a semiconductor circuit including two high frequency amplifiers; a cap substrate and a sealing frame of a conductor which forms and air-tightly seals space surrounding an area, in which the semiconductor circuit is formed, between the device substrate and the cap substrate, wherein the sealing frame is configured as a line of a 90-degree hybrid circuit or a line of a rat-race circuit.

A method of forming a semiconductor package is provided. The method includes forming a metallization stack over a semiconductor die. Polymer particles are mounted over the metallization stack. Each of the polymer particles is coated with a first bonding layer. A heat spreader lid is bonded with the semiconductor die by reflowing the first bonding layer. A composite thermal interface material (TIM) structure is formed between the heat spreader lid and the semiconductor die during the bonding. The composite TIM structure includes the first bonding layer and the polymer particles embedded in the first bonding layer.

A semiconductor device includes a circuit substrate, a semiconductor package, connective terminals and supports. The circuit substrate has a first side and a second side opposite to the first side. The semiconductor package is connected to the first side of the circuit substrate. The connective terminals are located on the second side of the circuit substrate and are electrically connected to the semiconductor package via the circuit substrate. The supports are located on the second side of the circuit substrate beside the connective terminals. A material of the supports has a melting temperature higher than a melting temperature of the connective terminals.

A light emitting device includes: a base having a first stepped portion and a second stepped portion; a light emitting element; an electronic member configured to be irradiated by light emitted from the light emitting element; a first wiring region located on the first stepped portion; a second wiring region located on the second stepped portion; wires connected to the light emitting element and the electronic member. The wires includes a first and second wires. The first wire has a first end that is connected to the first wiring region, and a second end. The second wire has a first end that is connected to the second wiring region, and a second end. A position of the second end of the first wire relative to the bottom face is lower than a position of the second end of the second wire relative to the bottom face.

A semiconductor device includes an insulating layer having a first surface and a second surface opposite to the first surface. The semiconductor device includes at least one semiconductor element located on a side of the first surface. The semiconductor device includes a first metal sinter and a second metal sinter. The first metal sinter is in contact with the first surface of the insulating layer and the semiconductor element, and bonds the insulating layer and the semiconductor element. The second metal sinter is in contact with the second surface of the insulating layer.

A disclosed semiconductor device includes a package substrate, a first semiconductor die coupled to the package substrate, a package lid attached to the package substrate and covering the semiconductor die, and a thermal interface material located between a top surface of the semiconductor die and an internal surface of the package lid. The semiconductor device may further include a dam formed on the internal surface of the package lid. The dam may constrain the thermal interface material on one or more sides of the first semiconductor die such that the thermal interface material is located within a predetermined volume between the top surface of the first semiconductor die and the internal surface of the package lid during a reflow operation. The package lid may include a metallic material and the dam may include an epoxy material formed as a single continuous structure or may be formed as several disconnected structures.

Provided are a package structure and a method of forming the same. The package structure includes a first die, a second die group, an interposer, an underfill layer, a thermal interface material (TIM), and an adhesive pattern. The first die and the second die group are disposed side by side on the interposer. The underfill layer is disposed between the first die and the second die group. The adhesive pattern at least overlay the underfill layer between the first die and the second die group. The TIM has a bottom surface being in direct contact with the first die, the second die group, and the adhesive pattern. The adhesive pattern separates the underfill layer from the TIM.

A semiconductor device, including a semiconductor module, a positioning member and a printed board. The semiconductor module includes a case that stores a semiconductor chip, a plurality of external terminals electrically connected to the semiconductor chip and extending upward from a front surface of the case, and a reference pin extending upward from the front surface of the case. The positioning member has a reference hole and a plurality of supporting holes penetrating therethrough. The printed board including a plurality of terminal holes that respectively correspond to the plurality of external terminals. The printed board is disposed on the front surface of the case via the positioning member. The plurality of external terminals of the semiconductor module are respectively attached to the plurality of terminal holes.