Patent classifications
H01L33/0054
DISPLAY PANEL, DISPLAY DEVICE AND MANUFACTURING METHOD
The present application discloses a display panel, a display device and a manufacturing method. The display panel includes light-emitting diodes. The light-emitting diodes includes a blue luminescent layer. The blue luminescent layer includes a germanium silicon quantum dot material. A proportion range of a silicon element in the light-emitting diodes is 65%-90%, and a proportion range of a germanium element is 10%-35%.
Silicon nano light emitting diodes
Light-emitting diodes having radiative recombination regions with deep sub-micron dimensions are described. The LEDs can be fabricated from indirect bandgap semiconductors and operated under forward bias conditions to produce intense light output from the indirect bandgap material. The light output per unit emission area can be over 500 W cm.sup.−2, exceeding the performance of even high brightness gallium nitride LEDs.
SILICON NANO LIGHT EMITTING DIODES
Light-emitting diodes having radiative recombination regions with deep sub-micron dimensions are described. The LEDs can be fabricated from indirect bandgap semiconductors and operated under forward bias conditions to produce intense light output from the indirect bandgap material. The light output per unit emission area can be over 500 W cm.sup.−2, exceeding the performance of even high brightness gallium nitride LEDs.
SHORT-WAVE INFRARED AND MID-WAVE INFRARED OPTOELECTRONIC DEVICE AND METHODS FOR MANUFACTURING THE SAME
There is provided an optoelectronic device having an operation range reaching and exceeding 4 μm. The optoelectronic device includes a silicon or a silicon-based substrate and a heterostructure at least partially extending over the substrate. The heterostructure includes a stack of coextending photoactive layers and each photoactive layer includes one or two group IV elements. The photoactive layers are configured for absorbing and/or emitting short-wave infrared and mid-wave infrared radiation. In some embodiments, the short-wave infrared and mid-wave infrared radiation is in a wavelength range extending from about 1 μm to about 8 μm. Methods for manufacturing such an optoelectronic device and device processing are also provided. The methods include forming a heterostructure on a substrate, releasing the heterostructure from the substrate to form a relaxed membrane and transferring the relaxed membrane on a host substrate.
Interconnect with nanotube fitting
A light emitting diode (LED) array is formed by bonding an LED substrate to a backplane substrate via fitted nanotube interconnects. The backplane substrate may include circuits for driving the LED array. The LED substrate may be a chip or wafer, and may include one or more LED devices. The LED substrate is positioned above the backplane substrate, such that a LED device of the LED substrate is aligned to a corresponding circuit in the backplane substrate. Each of the fitted interconnects electrically connect a LED device to the corresponding circuit of the backplane substrate.
Light-emitting diode and method for manufacturing thereof
The present application relates to the field of semiconductor, especially the Light-Emitting Diode (LED) and a manufacturing method thereof. In some examples, by etching the channel between adjacent light-emitting units, making the high reflection layer at the bottom of the channel, and producing interference fringes through the high reflection layer, and the side of the LED is exposed by using the interference fringes, thereby forming the structure of the groove and the protrusion on the side of the LED. Further, the width of the bottom of the groove can be larger than the width of the opening, and a silicon dioxide layer can be provided on the surfaces of the protrusion structures, which can further improve the luminous efficiency of the LED.
SEMICONDUCTOR DEVICE AND FABRICATING METHOD THEREFOR
The present invention relates to a semiconductor device (10), comprising a substrate (11), a semiconductor layer (12), a stressor layer (13), an insulator barrier (14) and a plurality of electrical connectors. The semiconductor layer (12) is sandwiched between the substrate (11) and the stressor layer (13). The stressor layer (13) is on top of the semiconductor layer (12) and is capable of inducing strain on the semiconductor layer (12). A method for fabricating a semiconductor device comprises the steps of forming a substrate (110), epitaxially growing a semiconductor layer on the substrate (120), depositing a stressor layer on the semiconductor layer (130) and forming a plurality of electrical connectors (140), wherein the electrical connectors are capable of electrically connecting the semiconductor device to an external circuit.
Magnetic clamping interconnects
A light emitting diode (LED) array is formed by bonding an LED substrate to a backplane substrate via magnetized interconnects. The backplane substrate may include circuits for driving the LED array, and each of the magnetized interconnects electrically connect a LED device to a corresponding circuit of the backplane substrate. The magnetized interconnects may be formed by electrically connecting first structures protruding from the backplane substrate to second structures protruding from the LED substrate. At least one of the first structure and the second structure includes ferromagnetic material configured to secure the first structure to the second structure.
LASER DIODES, LEDS, AND SILICON INTEGRATED SENSORS ON PATTERNED SUBSTRATES
The present disclosure falls into the field of optoelectronics, particularly, includes the design, epitaxial growth, fabrication, and characterization of Laser Diodes (LDs) operating in the ultraviolet (UV) to infrared (IR) spectral regime on patterned substrates (PSs) made with (formed on) low cost, large size Si, or GaN on sapphire, GaN, and other wafers. We disclose three types of PSs, which can be universal substrates, allowing any materials (III-Vs, II-VIs, etc.) grown on top of it with low defect and/or dislocation density.
CMOS pixels comprising epitaxial layers for light-sensing and light emission
Photonic devices monolithically integrated with CMOS are disclosed, including sub-100 nm CMOS, with active layers comprising acceleration regions, light emission and absorption layers, and optional energy filtering regions. Light emission or absorption is controlled by an applied voltage to deposited films on a pre-defined CMOS active area of a substrate, such as bulk Si, bulk Ge, Thick-Film SOI, Thin-Film SOI, Thin-Film GOI.