The disclosure relates to a machining station for machining platelike workpieces (1) by means of at least one tool (10, 13, 14). The machining station has a measuring device (16) for acquiring data relating to the position of bores, a drill (10, 13, 14) for generating bores in the workpiece (1), and a data processor (17) for processing data of the at least one measuring device (16) and/or for controlling the at least one drill (10, 13, 14). The data processor (17) is here suitable and set up for performing an adjustment between a desired drilling position and/or a desired bore depth and an actual position and/or actual depth as determined by the at least one measuring device (16) for a bore present in the workpiece (1), and adapting the drilling position and/or bore depth for generating bores by means of the at least one drill (10, 13, 14).

The present disclosure provides a printed circuit board and a wire arrangement method thereof. The printed circuit board includes a packaged chip and at least two connectors, wires of the packaged chip that are connected to different connectors are distributed on different board layers; and when the packaged chip is connected to one of the connectors, a via is backdrilled to form a high-speed path from the packaged chip to the connector, and copper walls of board layers corresponding to other connectors are drilled out. The wires of the packaged chip that are connected to different connectors are distributed on different board layers. When the packaged chip is connected to one of the connectors, according to backdrilling of different depths, the via is backdrilled to form a high-speed path from the packaged chip to the connector, and copper walls of board layers corresponding to other connectors are drilled out.

A printed circuit board which improves the peel strength of a wiring pattern formed at a cavity bottom portion while enabling connection between an electronic component inside a cavity and a circuit outside the cavity to be performed at the cavity bottom portion, includes a cavity in a partial region of a multilayer substrate laminated with an insulating resin layer and an electrical conductor layer on a bottom layer of an insulating resin substrate. The cavity opens on a side of the insulating resin substrate, penetrates the insulating resin substrate, and includes a surface of the insulating resin layer as a bottom surface. The electrical conductor layer has a surface, the surface having a height equivalent to a height of the surface of the insulating resin layer and being embedded in the insulating resin layer in a manner to form a portion of the bottom surface.

A component carrier includes a layer stack with at least one electrically insulating layer structure and/or at least one electrically conductive layer structure, at least one opening in the layer stack, a first curable dielectric element arranged at least partially on the opening, and a second curable dielectric element arranged adjacent to the first curable dielectric element, so that there is an interface region in between. A part of the first curable dielectric element extends partially into the opening.

Methods and systems for making a multi-layer circuit board are disclosed, including electrically connecting a boring device with a plated multi-layered circuit board; cutting a first bore having a first diameter through a first layer of the plated multi-layered circuit board; reciprocally extending a second cutting device a first predetermined distance into a barrel plated multi-layered circuit board and retracting the cutting device a second predetermined distance that is less than the first predetermined distance to form a second bore; after each retraction, sensing for electrical contact indicating a closed circuit between the cutting device and the plated multi-layered circuit board; if a closed circuit is sensed, determining if the second bore has reached an expected depth of a contact layer; and if the expected depth of the contact layer has not been reached, determining that a sliver has been formed in the barrel.

An apparatus includes a printed circuit board. The printed circuit board includes at least one conductive layer on top a first dielectric layer, wherein the at least one conductive layer comprises at least one of a ground plane and a power plane. The printed circuit board includes a second dielectric layer on top of the at least one conductive layer. The printed circuit board includes a thermal pad on top of the second dielectric layer. The printed circuit board is fabricated by forming at least one plated through hole for electrically coupling the thermal pad to the at least one conductive layer. The printed circuit board is fabricated by backdrilling the at least one plated through hole to remove a portion of the conductive material, wherein subsequent to the backdrilling the conductive material remaining in the at least one plated through hole electrically couples one or more of the at least one conductive layer to the thermal pad.

The present invention relates to a PCB drilling method including: performing a drilling motion from an initial location, and generating a first electrical signal when coming into contact with a first conductive layer of the PCB, determining a first conductive location according to the first electrical signal, and obtaining first Z-coordinate information continuing to perform the drilling motion after drilling through the first conductive layer, and generating a second electrical signal when coming into contact with a second conductive layer, determining a second conductive location according to the second electrical signal, and obtaining second Z-coordinate information; continuing to perform the drilling motion and drilling through the PCB to obtain a through hole; and performing backdrilling in the location of the through hole according to a preset depth, and the preset depth is a medium thickness between the second conductive layer and the first conductive layer plus a compensation depth.

Back drilling vias of a PCB, including: identifying a particular diameter of a particular via of multiple vias of the PCB; back drilling of the particular via with a first drill bit having a first diameter, the first diameter a first percentage greater than the particular diameter of the particular via; determining whether the first diameter of the first drill bit is a threshold percentage greater than the particular diameter of the particular via; determining that the first diameter of the first drill bit is less than the threshold percentage greater than the particular diameter of the particular via, and in response: back drilling of the particular via with a second drill bit having a second diameter, the second diameter a second percentage greater than the particular diameter of the particular via, the second diameter greater than the first diameter.

A printed circuit board is provided. The board includes a plurality of vias through the printed circuit board, each having a first section with a first width, a second section with a second width less than the first width, and a third section with a third width greater than the second width and less than the first width. The second section is located between the first section and the third section, the first and second sections are plated, and the third section lacks plating. At least one of the plurality of vias has the first width dimensioned to receive a connector pin inserted through the first face. A further at least one of the plurality of vias has the first width dimensioned to receive a further connector pin inserted through the second face. Further versions of the printed circuit board and method of making a printed circuit board are provided.

A disconnect cavity is formed within a PCB, where the disconnect cavity is electrically disconnected from a PCB landing layer. The disconnect cavity is formed using a plating resist process which does not require low flow prepreg nor selective copper etching. Plating resist is printed on a core structure selectively positioned within a PCB stack-up. The volume occupied by the plating resist forms a subsequently formed disconnect cavity. After lamination of the PCB stack-up, depth control milling, drilling and electroless copper plating are performed, followed by a plating resist stripping process to substantially remove the plating resist and all electroless copper plated to the plating resist, thereby forming the disconnect cavity. In a subsequent copper plating process, without electric connectivity copper cannot be plated to the side walls and bottom surface of the disconnect cavity, resulting in the disconnect cavity wall being electrically disconnected from the PCB landing layer.