A ceramic electronic device includes a dielectric layer and an internal electrode layer that are alternately stacked, wherein the dielectric layer contains yttria-stabilized zirconia and (Ca.sub.x1Ba.sub.x2Sr.sub.1-x1-x2)(Ti.sub.yZr.sub.1-y)O.sub.3 (0.6≤x1≤0.9, 0≤x2≤0.1, 0≤y≤0.1) as a main component, and wherein, in the dielectric layer, a concentration of the yttria-stabilized zirconia when a total amount of Ti and Zr is 100 mol % is 0.5 mol % or more and 5.0 mol % or less.

A ceramic electronic device includes a dielectric layer and an internal electrode layer that are alternately stacked, wherein the dielectric layer contains yttria-stabilized zirconia and (Ca.sub.x1Ba.sub.x2Sr.sub.1-x1-x2)(Ti.sub.yZr.sub.1-y)O.sub.3 (0.6≤x1≤0.9, 0≤x2≤0.1, 0≤y≤0.1) as a main component, and wherein, in the dielectric layer, a concentration of the yttria-stabilized zirconia when a total amount of Ti and Zr is 100 mol % is 0.5 mol % or more and 5.0 mol % or less.

A multilayer ceramic capacitor includes a multilayer body including dielectric layers, inner-electrode layers, and outer electrodes coupled to the inner-electrode layers. The multilayer body includes Ba, Ti, Ca, Mg, Zr, and R, and when the Ti content is defined as 100 parts by mole, the relative amounts are as follows: Ca, 0.03 parts by mole or more and 0.15 parts by mole or less, Mg, 0.01 parts by mole or more and 0.09 parts by mole or less, R, 2.5 parts by mole or more and 8.4 parts by mole or less; Zr, 0.05 parts by mole or more and 3.00 parts by mole or less: Si, 0.5 parts by mole or more and 4.0 parts by mole or less; and P, 0.005 parts by mole or more and 0.500 parts by mole or less. Ca is in a vicinity of the center of crystal grains contained in the dielectric layers.

The present invention provides a leadless stacked ceramic capacitor. the capacitor body are respectively provided with internal electrode terminals. The part forms an electrical connection with the external electrodes, and a plurality of multilayer ceramic capacitors are vertically stacked, and the two adjacent external electrodes are cured to form an adhesive interface by polymer conductive adhesive, and the polymer conductive adhesive includes 75%˜85% metal powder and 15%˜25% viscose provide support strength and conductive channels.

The present invention provides a leadless stacked ceramic capacitor. the capacitor body are respectively provided with internal electrode terminals. The part forms an electrical connection with the external electrodes, and a plurality of multilayer ceramic capacitors are vertically stacked, and the two adjacent external electrodes are cured to form an adhesive interface by polymer conductive adhesive, and the polymer conductive adhesive includes 75%˜85% metal powder and 15%˜25% viscose provide support strength and conductive channels.

A ceramic electronic component includes a body, including a dielectric layer and an internal electrode. The dielectric layer includes a plurality of dielectric grains, and at least one of the plurality of dielectric grains has a core-dual shell structure having a core and a dual shell. The dual shell includes a first shell, surrounding at least a portion of the core, and a second shell, surrounding at least a portion of the first shell. The dual shell includes different types of rare earth elements R1 and R2, and R2.sub.S1/R1.sub.S1 is 0.01 or less and R2.sub.S2/R1.sub.S1 is 0.5 to 3.0, where R1.sub.S1 and R1.sub.S2 denote concentrations of R1 included in the first shell and the second shell, respectively, and R2.sub.S1 and R2.sub.S2 denote concentrations of R2 included in the first shell and the second shell, respectively.

A ceramic electronic component includes a body, including a dielectric layer and an internal electrode. The dielectric layer includes a plurality of dielectric grains, and at least one of the plurality of dielectric grains has a core-dual shell structure having a core and a dual shell. The dual shell includes a first shell, surrounding at least a portion of the core, and a second shell, surrounding at least a portion of the first shell. The dual shell includes different types of rare earth elements R1 and R2, and R2.sub.S1/R1.sub.S1 is 0.01 or less and R2.sub.S2/R1.sub.S1 is 0.5 to 3.0, where R1.sub.S1 and R1.sub.S2 denote concentrations of R1 included in the first shell and the second shell, respectively, and R2.sub.S1 and R2.sub.S2 denote concentrations of R2 included in the first shell and the second shell, respectively.

An electronic component includes: an ESD discharge member including a substrate having first and second surfaces opposing each other, first and second through-holes penetrating through the substrate, and first and second conductors; and a multilayer capacitor disposed on the first surface of the substrate, in which the multilayer capacitor may include: a capacitor body; and first and second external electrodes disposed outside the capacitor body and connected to the first and second conductors, respectively, and the first and second conductors may include first and second via electrodes coated on inner walls of the first and second through-holes, respectively.

An electronic component includes: an ESD discharge member including a substrate having first and second surfaces opposing each other, first and second through-holes penetrating through the substrate, and first and second conductors; and a multilayer capacitor disposed on the first surface of the substrate, in which the multilayer capacitor may include: a capacitor body; and first and second external electrodes disposed outside the capacitor body and connected to the first and second conductors, respectively, and the first and second conductors may include first and second via electrodes coated on inner walls of the first and second through-holes, respectively.

Disclosed herein a thin film capacitor that includes a lower electrode layer, an upper electrode layer, and a dielectric layer disposed between the lower electrode layer and the upper electrode layer. The lower electrode layer includes a first metal layer positioned on a side facing the dielectric layer and a second metal layer positioned on a side facing away from the dielectric layer. The first metal layer has a first surface positioned on a side facing the second metal layer and a second surface positioned on a side facing the dielectric layer. The first surface has a surface roughness higher than that of the second surface. The second metal layer reflects a surface property of the first surface.