A multilayer ceramic capacitor (MLCC) includes a body including first dielectric layers and second dielectric layers, the body including first to sixth surfaces, a second surface, a third surface, a fourth surface, a fifth surface and a sixth surface; first internal electrodes disposed on the first dielectric layers, exposed to the third surface, the fifth surface, and the sixth surface, and spaced apart from the fourth surface by first spaces; second internal electrodes disposed on the second dielectric layers to oppose the first internal electrodes with the first dielectric layers or the second dielectric layers interposed therebetween, exposed to the fourth surface, the fifth surface, and the sixth surface, and spaced apart from the third surface by second spaces; first dielectric patterns disposed in at least a portion of the first spaces, and second dielectric patterns disposed in at least a portion of the second spaces; and lateral insulating layers.

A multilayer ceramic electronic component includes a ceramic body including first and second internal electrodes disposed to face each other and a dielectric layer interposed therebetween. When an average thickness of the dielectric layer is denoted as ‘td,’ an average thickness of the first and second internal electrodes is denoted as ‘te,’ and a standard deviation of thicknesses of an internal electrode, measured at a plurality of points in a predetermined region of the internal electrode, is denoted as ‘σte,’ a ratio of the standard deviation of thicknesses of the internal electrode to the average thickness of the dielectric layer, which is denoted as ‘σte/td,’ satisfies 0.12≤σte/td≤0.21.

A multilayer ceramic electronic component includes a ceramic body including first and second internal electrodes disposed to face each other and a dielectric layer interposed therebetween. When an average thickness of the dielectric layer is denoted as ‘td,’ an average thickness of the first and second internal electrodes is denoted as ‘te,’ and a standard deviation of thicknesses of an internal electrode, measured at a plurality of points in a predetermined region of the internal electrode, is denoted as ‘σte,’ a ratio of the standard deviation of thicknesses of the internal electrode to the average thickness of the dielectric layer, which is denoted as ‘σte/td,’ satisfies 0.12≤σte/td≤0.21.

A dielectric material includes a main component represented by (Ba.sub.1-xCa.sub.x)(Ti.sub.1-yZr.sub.y)O.sub.3, (Ba.sub.1-xCa.sub.x)(Ti.sub.1-ySn.sub.y)O.sub.3, or (Ba.sub.1-xCa.sub.x)(Ti.sub.1-yHf.sub.y)O.sub.3 (0≤x≤1 and 0≤y≤0.05) and a subcomponent. When an angle corresponding to a maximum peak is referred to as θ.sub.0 and angles corresponding to a full width at half maximum (FWHM) are respectively referred to as θ.sub.1 and θ.sub.2 (θ1<θ2) in the peaks of (002) and (200) plane of an x-ray diffraction (XRD) pattern using Cu Kα1 radiation (wavelength Δ=1.5406 Å), (θ.sub.2−θ.sub.0)/(θ.sub.0−θ.sub.1) is greater than 0.54 to 1.0 or less.

A dielectric material includes a main component represented by (Ba.sub.1-xCa.sub.x)(Ti.sub.1-yZr.sub.y)O.sub.3, (Ba.sub.1-xCa.sub.x)(Ti.sub.1-ySn.sub.y)O.sub.3, or (Ba.sub.1-xCa.sub.x)(Ti.sub.1-yHf.sub.y)O.sub.3 (0≤x≤1 and 0≤y≤0.05) and a subcomponent. When an angle corresponding to a maximum peak is referred to as θ.sub.0 and angles corresponding to a full width at half maximum (FWHM) are respectively referred to as θ.sub.1 and θ.sub.2 (θ1<θ2) in the peaks of (002) and (200) plane of an x-ray diffraction (XRD) pattern using Cu Kα1 radiation (wavelength Δ=1.5406 Å), (θ.sub.2−θ.sub.0)/(θ.sub.0−θ.sub.1) is greater than 0.54 to 1.0 or less.

A multilayer ceramic electronic component includes first and second multilayer ceramic electronic component bodies facing each other in a length direction that connects first and second end surfaces. A first metal terminal is connected to a first outer electrode. A second metal terminal is connected to a fourth outer electrode. An outer casing covers the first and second multilayer ceramic electronic component bodies, and at least a portion of each of the first and second metal terminals. A third metal terminal is exposed from the outer casing.

A multilayer ceramic electronic component includes first and second multilayer ceramic electronic component bodies facing each other in a length direction that connects first and second end surfaces. A first metal terminal is connected to a first outer electrode. A second metal terminal is connected to a fourth outer electrode. An outer casing covers the first and second multilayer ceramic electronic component bodies, and at least a portion of each of the first and second metal terminals. A third metal terminal is exposed from the outer casing.

A ceramic electronic component includes a body including a dielectric layer and an internal electrode, and an external electrode disposed on the body and connected to the internal electrode. The dielectric layer includes a plurality of dielectric grains, and at least one of the plurality of dielectric grains has a core-dual shell structure having a core and a dual shell. The dual shell includes a first shell surrounding at least a portion of the core, and a second shell surrounding at least a portion of the first shell, and a concentration of a rare earth element included in the second shell is more than 1.3 times to less than 3.8 times a concentration of a rare earth element included in the first shell.

A ceramic electronic component includes a body including a dielectric layer and an internal electrode, and an external electrode disposed on the body and connected to the internal electrode. The dielectric layer includes a plurality of dielectric grains, and at least one of the plurality of dielectric grains has a core-dual shell structure having a core and a dual shell. The dual shell includes a first shell surrounding at least a portion of the core, and a second shell surrounding at least a portion of the first shell, and a concentration of a rare earth element included in the second shell is more than 1.3 times to less than 3.8 times a concentration of a rare earth element included in the first shell.

A ceramic electronic device includes a multilayer structure in which each of a plurality of dielectric layers and each of a plurality of internal electrode layers are alternately stacked. A relationship of “I.sub.A/I.sub.B>0.30” is satisfied and a peak current value I.sub.B is 100 pA/mm.sup.2 or less in a TSDC in which a polarizing temperature is 150 degrees C., a polarizing electric field is 15 V/μm to 20 V/μm, a polarizing time is 60 minutes, and an increasing speed of temperature is 10° C./minute, when a peak current of a low temperature side of a temperature range of 160 degrees C. or more and less than 230 degrees C. is I.sub.A and a peak current of a high temperature side of a temperature range of 230 degrees C. or more and 350 degrees C. or less is I.sub.B.