Dielectric capacitors including dielectric compositions with high dielectric constant, low dielectric loss, and high thermal stability are disclosed. The dielectric compositions can include a dipolar polymer having a high glass transition temperature (e.g., T.sub.g>150 C.) in combination with either (i) another dipolar polymer having a high glass transition temperature (e.g., T.sub.g150 C.) in the form of a blend, or (ii) the dipolar polymer with an inorganic interfacial agent volume content less than 2 vol % in the dielectric composition.

Dielectric ceramic particulates are introduced into thin a sheet of pre-cured elastomer to form a sheet. Successive layers of the sheets may then be laminated together to form a finished article. An electric field may be applied to the article during a curing process while the article is at a temperature near a Curie temperature of the dielectric ceramic particulates to increase a dielectric constant of the article. As each sheet may be different from each other in the finished article, the resulting finished article may have anisotropic dielectric and mechanical properties. Similarly, tiled dielectric ceramic structures may be introduced into the elastomers layers to generate materials with varying dielectric constants.

A gate-all around fin double diffused metal oxide semiconductor (DMOS) devices and methods of manufacture are disclosed. The method includes forming a plurality of fin structures from a substrate. The method further includes forming a well of a first conductivity type and a second conductivity type within the substrate and corresponding fin structures of the plurality of fin structures. The method further includes forming a source contact on an exposed portion of a first fin structure. The method further comprises forming drain contacts on exposed portions of adjacent fin structures to the first fin structure. The method further includes forming a gate structure in a dielectric fill material about the first fin structure and extending over the well of the first conductivity type.

A gate-all around fin double diffused metal oxide semiconductor (DMOS) devices and methods of manufacture are disclosed. The method includes forming a plurality of fin structures from a substrate. The method further includes forming a well of a first conductivity type and a second conductivity type within the substrate and corresponding fin structures of the plurality of fin structures. The method further includes forming a source contact on an exposed portion of a first fin structure. The method further comprises forming drain contacts on exposed portions of adjacent fin structures to the first fin structure. The method further includes forming a gate structure in a dielectric fill material about the first fin structure and extending over the well of the first conductivity type.

A multicomponent dielectric film includes discrete overlapping dielectric layers of at least a first polymer material, a second polymer material, and a third polymer material. Adjoining dielectric layers define a generally planar interface therebetween which lies generally in an x-y plane of an x-y-z coordinate system. The interfaces between the layers delocalizing the charge build up in the layers. At least one dielectric layer including a stack of discrete polymer layers with polymer layer interfaces extending transverse to the x-y plane and optionally at least one filler having a higher dielectric constant than the first polymer material, the second polymer material, and/or the third polymer material.

A multicomponent dielectric film includes discrete overlapping dielectric layers of at least a first polymer material, a second polymer material, and a third polymer material. Adjoining dielectric layers define a generally planar interface therebetween which lies generally in an x-y plane of an x-y-z coordinate system. The interfaces between the layers delocalizing the charge build up in the layers. At least one dielectric layer including a stack of discrete polymer layers with polymer layer interfaces extending transverse to the x-y plane and optionally at least one filler having a higher dielectric constant than the first polymer material, the second polymer material, and/or the third polymer material.

A film capacitor that includes a laminate having a first resin film including a first metal layer on a surface thereof alternately laminated with a second resin film including a second metal layer on a surface thereof, the laminate having opposed first and second ends, a first external electrode on the first end of the laminate, and a second external electrode on the second end of the laminate, wherein the first resin film protrudes more than the second resin film by a first protruding length of 0.5 mm to 3 mm on the first end of the laminate, and the first resin film has a Young's modulus at 150 C. of 0.6 GPa or more in a direction perpendicular to a lamination direction of the laminate and parallel to a direction from the first end to the second end of the laminate.

Various examples disclosed relate to a substrate. The substrate includes a cold-sintered hybrid material. The cold-sintered hybrid material includes a polymer component and a ceramic component. The substrate further includes a conductor at least partially embedded within the cold-sintered hybrid material. The substrate further includes a via attached to the conductor. The cold-sintered hybrid material has a relative density in a range of from about 80% to about 99%.

A dielectric structure including solid dielectric regions incorporating a plurality of regions of vacuum or gas is provided. The dielectric constant of the regions of solid dielectrics can have a dielectric constant greater than 4. Each of the plurality of regions of vacuum or gas or the regions of solid dielectrics may be anisotropic with an aspect ratio of at least four. The smallest average dimension of a plurality of regions of vacuum or gas and/or solid dielectrics can have a length of less than 1 micron. The dielectric structure may have a higher electrical energy density in the regions of vacuum or gas than in the solid matrix. One or more electrodes of the capacitive structure can be coated with a solid insulating layer without an interface between a region of vacuum or gas and electrode.

A dielectric structure including solid dielectric regions incorporating a plurality of regions of vacuum or gas is provided. The dielectric constant of the regions of solid dielectrics can have a dielectric constant greater than 4. Each of the plurality of regions of vacuum or gas or the regions of solid dielectrics may be anisotropic with an aspect ratio of at least four. The smallest average dimension of a plurality of regions of vacuum or gas and/or solid dielectrics can have a length of less than 1 micron. The dielectric structure may have a higher electrical energy density in the regions of vacuum or gas than in the solid matrix. One or more electrodes of the capacitive structure can be coated with a solid insulating layer without an interface between a region of vacuum or gas and electrode.