A ceramic electronic component includes a body including a dielectric layer and a plurality of internal electrodes stacked in a first direction with the dielectric layer interposed therebetween and including first and second surfaces opposing each other in the first direction and side surfaces connected to the first and second surfaces, an external electrode disposed on one of the side surfaces of the body extending onto a portion of the first surface of the body, and an insulating layer covering a surface of the external electrode and including a plurality of openings exposing the external electrode, wherein a ratio of an area of the plurality of openings to an area of the surface of the external electrode covered by the insulating layer is 20% to 70%.

An electronic component manufacturing method comprising: a first step of moving an electronic component body in a first direction relative to a dip layer of a conductive paste to immerse the electronic component body in the dip layer; a second step of moving the electronic component body relative to the dip layer in a second direction that is opposite to the first direction, thereby separating the electronic component body from the dip layer; a third step of forcibly cutting a connection between the conductive paste coated on the end portions of the electronic component body and the dip layer, using a contact with a solid or fluid cutter; and a fourth step of removing excess paste from the conductive paste coated on the end portions of the electronic component body. The third and fourth steps may be conducted simultaneously by cutting and removing the paste with the paste removal member.

An electronic component manufacturing method comprising: a first step of moving an electronic component body in a first direction relative to a dip layer of a conductive paste to immerse the electronic component body in the dip layer; a second step of moving the electronic component body relative to the dip layer in a second direction that is opposite to the first direction, thereby separating the electronic component body from the dip layer; a third step of forcibly cutting a connection between the conductive paste coated on the end portions of the electronic component body and the dip layer, using a contact with a solid or fluid cutter; and a fourth step of removing excess paste from the conductive paste coated on the end portions of the electronic component body. The third and fourth steps may be conducted simultaneously by cutting and removing the paste with the paste removal member.

The present invention is directed to a multilayer capacitor and a circuit board containing the multilayer capacitor. The capacitor includes a main body containing a first set of alternating dielectric layers and internal electrode layers and a second set of alternating dielectric layers and internal electrode layers. Each set contains a first internal electrode layer and a second internal electrode layer wherein each layer includes a top edge, a bottom edge opposite the top edge, and two side edges that define a main body of the layer. Each layer contains at least one lead tab extending from the top edge of the main body of the layer and at least one lead tab extending from the bottom edge of the main body of the layer wherein the lead tabs are offset from the side edges of the main body of the layer. In addition, external terminals are electrically connected to the internal electrode layers wherein the external terminals are formed on a top surface of the capacitor and a bottom surface of the capacitor opposing the top surface of the capacitor.

The present invention is directed to a multilayer capacitor and a circuit board containing the multilayer capacitor. The capacitor includes a main body containing a first set of alternating dielectric layers and internal electrode layers and a second set of alternating dielectric layers and internal electrode layers. Each set contains a first internal electrode layer and a second internal electrode layer wherein each layer includes a top edge, a bottom edge opposite the top edge, and two side edges that define a main body of the layer. Each layer contains at least one lead tab extending from the top edge of the main body of the layer and at least one lead tab extending from the bottom edge of the main body of the layer wherein the lead tabs are offset from the side edges of the main body of the layer. In addition, external terminals are electrically connected to the internal electrode layers wherein the external terminals are formed on a top surface of the capacitor and a bottom surface of the capacitor opposing the top surface of the capacitor.

A capacitor that can make a failure mode into an open mode even when a short circuit caused by insulation breakdown occurs in a dielectric layer is provided. The capacitor includes: a substrate; an MIM structure disposed on the Substrate, the MIM structure including a dielectric layer, a bottom electrode layer disposed on one side of the dielectric layer and composed of a first conductive material, and a top electrode layer disposed on the other side of the dielectric layer; a first external electrode disposed on the substrate; a second external electrode disposed on the substrate; and a connection conductor connecting between the bottom electrode layer and the first external electrode, the connection conductor including a first contact portion contacting the substrate.

A capacitor that can make a failure mode into an open mode even when a short circuit caused by insulation breakdown occurs in a dielectric layer is provided. The capacitor includes: a substrate; an MIM structure disposed on the Substrate, the MIM structure including a dielectric layer, a bottom electrode layer disposed on one side of the dielectric layer and composed of a first conductive material, and a top electrode layer disposed on the other side of the dielectric layer; a first external electrode disposed on the substrate; a second external electrode disposed on the substrate; and a connection conductor connecting between the bottom electrode layer and the first external electrode, the connection conductor including a first contact portion contacting the substrate.

A semiconductor device is provided that includes a substrate 10 with first and second opposing main surfaces, a circuit layer disposed on the first main surface, and a first resin body on a surface of the circuit layer opposite from the substrate. The circuit layer includes first and second electrode layers on a side of the semiconductor substrate, a dielectric layer disposed between the electrode layers, a first outer electrode electrically connected to the first electrode layer and extended to the surface of the circuit layer, and a second outer electrode electrically connected to the second electrode layer and extended to the surface of the circuit layer. The first resin body is between the first and second outer electrodes in a plan view, and in sectional view, a tip end of the first resin body is positioned higher than tip ends of the first and second outer electrodes.

A semiconductor device is provided having a semiconductor substrate with a circuit layer provided on a first main surface of the semiconductor substrate. The circuit layer includes a first and second electrode layers with a dielectric layer disposed therebetween, a first outer electrode electrically connected to the first electrode layer and a second outer electrode electrically connected to the second electrode layer. When the circuit layer is viewed from above, the first electrode layer has a first facing portion facing the second electrode layer in the thickness direction and a first non-facing portion not facing the second electrode layer, and the second electrode layer has a second facing portion facing the first electrode layer in the thickness direction and a second non-facing portion not facing the first electrode layer.

Electrically conductive ink compositions are provided that comprise at carbon nanomaterials of one-dimensional, two-dimensional, and quasi-three-dimensional nanostructures and/or their combinations, and/or doping with elements such as nitrogen, boron, sulfur, in certain ratios. The carbon nanomaterials are selected from the group consisting of graphene and graphene oxide particles, carbon nanotubes, and graphene aerosol gels.