A pressure-sensitive adhesive sheet capable of allowing a small electronic part to be temporarily fixed in a satisfactory manner and satisfactorily peeled. The pressure-sensitive adhesive sheet includes: a gas-generating layer; and a gas barrier layer arranged on at least one side of the gas-generating layer, wherein the gas barrier layer is a layer that is deformed through laser light irradiation of the pressure-sensitive adhesive sheet, wherein a thickness (μm) of a highly elastic portion of the gas barrier layer is equal to or smaller than a value calculated by the following expression (1), and wherein the thickness (μm) of the highly elastic portion of the gas barrier layer is equal to or larger than a value calculated by the following expression (2): 12546×EXP(−0.728×log.sub.10(Er×10.sup.6)) . . . (1); 18096×EXP(−0.949×log.sub.10(Er×10.sup.6)) . . . (2), where Er represents a modulus of elasticity (MPa) of the highly elastic portion of the gas barrier layer by a nanoindentation method at 25° C.

A semiconductor device has a first semiconductor package including a substrate and an encapsulant deposited over the substrate. An adhesive tape is disposed on the encapsulant. A conductive via is formed by trench cutting through the adhesive tape and encapsulant to expose the substrate. A second semiconductor package is disposed over the adhesive tape opposite the first semiconductor package. The first semiconductor package and second semiconductor package are bonded together by the adhesive tape.

This application discloses a chip package assembly, an electronic device, and a preparation method of a chip package assembly. The chip package assembly includes a package substrate, a chip, and a heat dissipation part. The package substrate includes an upper conductive layer, a lower conductive layer, and a conductive part connected between the upper conductive layer and the lower conductive layer. The chip includes a front electrode and a back electrode that are disposed opposite each other, the chip is embedded in the package substrate, the conductive part surrounds the chip, the front electrode is connected to the lower conductive layer, and the back electrode is connected to the upper conductive layer. The heat dissipation part is connected to a surface of the upper conductive layer that is away from the chip. The upper conductive layer, the lower conductive layer, and the conductive part each conduct heat.

The present disclosure relates to a radio frequency (RF) device that includes a mold device die and a multilayer redistribution structure underneath the mold device die. The mold device die includes a device region with a back-end-of-line (BEOL) portion and a front-end-of-line (FEOL) portion over the BEOL portion, and a first mold compound. The FEOL portion includes an active layer, a contact layer, and isolation sections. Herein, the active layer and the isolation sections reside over the contact layer, and the active layer is surrounded by the isolation sections. The first mold compound resides over the active layer without silicon crystal, which has no germanium content, in between. The multilayer redistribution structure includes redistribution interconnections and a number of bump structures that are at bottom of the multilayer redistribution structure and electrically coupled to the mold device die via the redistribution interconnections.

A method includes forming an interconnect component including a plurality of dielectric layers that include an organic dielectric material, and a plurality of redistribution lines extending into the plurality of dielectric layers. The method further includes bonding a first package component and a second package component to the interconnect component, encapsulating the first package component and the second package component in an encapsulant, and precutting the interconnect component using a blade to form a trench. The trench penetrates through the interconnect component, and partially extends into the encapsulant. The method further includes performing a singulation process to separate the first package component and the second package component into a first package and a second package, respectively.

A semiconductor device assembly includes a first remote distribution layer (RDL), the first RDL comprising a lower outermost planar surface of the semiconductor device assembly; a first semiconductor die directly coupled to an upper surface of the first RDL by a first plurality of interconnects; a second RDL, the second RDL comprising an upper outermost planar surface of the semiconductor device assembly opposite the lower outermost planar surface; a second semiconductor die directly coupled to a lower surface of the second RDL by a second plurality of interconnects; an encapsulant material disposed between the first RDL and the second RDL and at least partially encapsulating the first and second semiconductor dies; and a third plurality of interconnects extending fully between and directly coupling the upper surface of the first RDL and the lower surface of the second RDL.

The embodiment of the disclosure provides a composite layer circuit element and a manufacturing method thereof. The manufacturing method of the composite layer circuit element includes the following. A carrier is provided. A first dielectric layer is formed on the carrier, and the first dielectric layer is patterned. The carrier on which the first dielectric layer is formed is disposed on a first curved-surface mold, and the first dielectric layer is cured. A second dielectric layer is formed on the first dielectric layer. The second dielectric layer is patterned. The carrier on which the first dielectric layer and the second dielectric layer are formed is disposed on a second curved-surface mold, and the second dielectric layer is cured. A thickness of a projection of the first curved-surface mold is smaller than a thickness of a projection of the second curved-surface mold.

A method for transferring objects and a transfer apparatus using the same are provided. The method includes the following steps: controlling, during a first period, the ejector at an ejecting working position to perform an ejecting process along with a first direction, to transfer the object from the first substrate to the second substrate; controlling, during a second period, the ejector to move to an ejecting standby position along with a second direction which is non-parallel to the first direction, to expose at least one of the object on the first substrate to a detection range of an image capturing device; detecting the position of the object in the detection range to obtain calibration information; and adjusting the position of the first substrate according to the calibration information.

The present disclosure provides a package device and a manufacturing method thereof. The package device includes an electronic device, a conductive pad having a first bottom surface, and a redistribution layer disposed between the conductive pad and the electronic device. The redistribution layer has a second bottom surface, and the conductive pad is electrically connected to the electronic device through the redistribution layer. The first bottom surface is closer to the electronic device than the second bottom in a normal direction of the electronic device.

A semiconductor structure includes a fan-out package, a packaging substrate, an solder material portions bonded to the fan-out package and the packaging substrate, an underfill material portion laterally surrounding the solder material portions, and at least one cushioning film located on the packaging substrate and contacting the underfill material portion and having a Young's modulus is lower than a Young's modulus of the underfill material portion.